blob: c273071182cb5e8f9609a0fc73baec890d0bbf29 [file] [log] [blame]
Damien Zammit62477932015-05-03 21:34:38 +10001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
Damien Zammit62477932015-05-03 21:34:38 +100017#define __SIMPLE_DEVICE__
18
19#include <arch/io.h>
Damien Zammitf7060f12015-11-14 00:59:21 +110020#include <device/device.h>
21#include <device/pci_def.h>
22#include <console/console.h>
Damien Zammit62477932015-05-03 21:34:38 +100023#include <cbmem.h>
24#include <northbridge/intel/pineview/pineview.h>
25
Damien Zammitf7060f12015-11-14 00:59:21 +110026u8 decode_pciebar(u32 *const base, u32 *const len)
Damien Zammit62477932015-05-03 21:34:38 +100027{
Damien Zammitf7060f12015-11-14 00:59:21 +110028 *base = 0;
29 *len = 0;
30 const pci_devfn_t dev = PCI_DEV(0,0,0);
31 u32 pciexbar = 0;
32 u32 pciexbar_reg;
33 u32 reg32;
34 int max_buses;
35 const struct {
36 u16 num_buses;
37 u32 addr_mask;
38 } busmask[] = {
39 {256, 0xf0000000},
40 {128, 0xf8000000},
41 {64, 0xfc000000},
42 {0, 0},
43 };
Damien Zammit62477932015-05-03 21:34:38 +100044
Damien Zammitf7060f12015-11-14 00:59:21 +110045 if (!dev)
46 return 0;
Damien Zammit62477932015-05-03 21:34:38 +100047
Damien Zammitf7060f12015-11-14 00:59:21 +110048 pciexbar_reg = pci_read_config32(dev, PCIEXBAR);
49
50 // MMCFG not supported or not enabled.
51 if (!(pciexbar_reg & (1 << 0))) {
52 printk(BIOS_WARNING, "WARNING: MMCONF not set\n");
53 return 0;
Damien Zammit62477932015-05-03 21:34:38 +100054 }
Damien Zammitf7060f12015-11-14 00:59:21 +110055
56 reg32 = (pciexbar_reg >> 1) & 3;
57 pciexbar = pciexbar_reg & busmask[reg32].addr_mask;
58 max_buses = busmask[reg32].num_buses;
59
60 if (!pciexbar) {
61 printk(BIOS_WARNING, "WARNING: pciexbar invalid\n");
62 return 0;
63 }
64
65 *base = pciexbar;
66 *len = max_buses << 20;
67 return 1;
Damien Zammit62477932015-05-03 21:34:38 +100068}
69
Damien Zammitf7060f12015-11-14 00:59:21 +110070/** Decodes used Graphics Mode Select (GMS) to kilobytes. */
71u32 decode_igd_memory_size(const u32 gms)
Damien Zammit62477932015-05-03 21:34:38 +100072{
Damien Zammitf7060f12015-11-14 00:59:21 +110073 const u32 gmssize[] = {
74 0, 1, 4, 8, 16, 32, 48, 64, 128, 256
75 };
76
77 if (gms > 9) {
78 printk(BIOS_DEBUG, "Bad Graphics Mode Select (GMS) value.\n");
79 return 0;
80 }
81 return gmssize[gms] << 10;
82}
83
84/** Decodes used Graphics Stolen Memory (GSM) to kilobytes. */
85u32 decode_igd_gtt_size(const u32 gsm)
86{
87 const u8 gsmsize[] = {
88 0, 1, 0, 0,
89 };
90
91 if (gsm > 3) {
92 printk(BIOS_DEBUG, "Bad Graphics Stolen Memory (GSM) value.\n");
93 return 0;
94 }
95 return (u32)(gsmsize[gsm] << 10);
Damien Zammit62477932015-05-03 21:34:38 +100096}