| Jon Dufresne | 8c4af2b | 2009-01-20 20:25:48 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2006 Jon Dufresne <jon.dufresne@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| Jon Dufresne | 8c4af2b | 2009-01-20 20:25:48 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| Andreas Schultz | b6b29db | 2010-08-30 16:19:04 +0000 | [diff] [blame] | 17 | #ifndef NORTHBRIDGE_INTEL_I855_RAMINIT_H |
| 18 | #define NORTHBRIDGE_INTEL_I855_RAMINIT_H |
| Jon Dufresne | 8c4af2b | 2009-01-20 20:25:48 +0000 | [diff] [blame] | 19 | |
| Uwe Hermann | 6e9ab97 | 2010-11-22 12:59:36 +0000 | [diff] [blame] | 20 | /* i855 Northbridge PCI devices */ |
| Andreas Schultz | b6b29db | 2010-08-30 16:19:04 +0000 | [diff] [blame] | 21 | #define NORTHBRIDGE PCI_DEV(0, 0, 0) |
| 22 | #define NORTHBRIDGE_MMC PCI_DEV(0, 0, 1) |
| 23 | |
| 24 | /* The i855 supports max. 2 dual-sided SO-DIMMs. */ |
| Jon Dufresne | 8c4af2b | 2009-01-20 20:25:48 +0000 | [diff] [blame] | 25 | #define DIMM_SOCKETS 2 |
| 26 | |
| Uwe Hermann | 6e9ab97 | 2010-11-22 12:59:36 +0000 | [diff] [blame] | 27 | void sdram_initialize(void); |
| Stefan Reinauer | c264ad9 | 2010-04-14 09:04:31 +0000 | [diff] [blame] | 28 | |
| Andreas Schultz | b6b29db | 2010-08-30 16:19:04 +0000 | [diff] [blame] | 29 | #endif /* NORTHBRIDGE_INTEL_I855_RAMINIT_H */ |