| Kyösti Mälkki | 9e97423 | 2013-07-01 11:21:53 +0300 | [diff] [blame] | 1 | #include <arch/io.h> |
| 2 | |
| 3 | static void bootblock_northbridge_init(void) |
| 4 | { |
| 5 | /* |
| 6 | * The "io" variant of the config access is explicitly used to |
| 7 | * setup the PCIEXBAR because CONFIG_MMCONF_SUPPORT_DEFAULT is set to |
| 8 | * to true. That way all subsequent non-explicit config accesses use |
| 9 | * MCFG. This code also assumes that bootblock_northbridge_init() is |
| 10 | * the first thing called in the non-asm boot block code. The final |
| 11 | * assumption is that no assembly code is using the |
| 12 | * CONFIG_MMCONF_SUPPORT_DEFAULT option to do PCI config acceses. |
| 13 | * |
| 14 | * The PCIEXBAR is assumed to live in the memory mapped IO space under |
| 15 | * 4GiB. |
| 16 | */ |
| 17 | |
| 18 | /* setup PCIe MMCONF base address */ |
| 19 | pci_io_write_config32(PCI_DEV(0, 16, 0), 0x64, |
| 20 | CONFIG_MMCONF_BASE_ADDRESS >> 16); |
| 21 | } |