| Sven Schnelle | 1767086 | 2012-02-01 22:06:45 +0100 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
| 4 | # Copyright (C) 2007-2009 coresystems GmbH |
| 5 | # |
| 6 | # This program is free software; you can redistribute it and/or modify |
| 7 | # it under the terms of the GNU General Public License as published by |
| 8 | # the Free Software Foundation; version 2 of the License. |
| 9 | # |
| 10 | # This program is distributed in the hope that it will be useful, |
| 11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | # GNU General Public License for more details. |
| 14 | # |
| Sven Schnelle | 1767086 | 2012-02-01 22:06:45 +0100 | [diff] [blame] | 15 | |
| Stefan Reinauer | e1133b7 | 2015-04-27 14:04:38 -0700 | [diff] [blame] | 16 | ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I5000),y) |
| 17 | |
| Patrick Georgi | 23f38cd | 2012-11-16 14:50:32 +0100 | [diff] [blame] | 18 | ramstage-y += northbridge.c |
| Patrick Georgi | e135ac5 | 2012-11-20 11:53:47 +0100 | [diff] [blame] | 19 | romstage-y += raminit.c |
| Aaron Durbin | 439356f | 2015-09-02 22:23:11 -0500 | [diff] [blame] | 20 | cpu_incs-y += src/northbridge/intel/i5000/halt_second_bsp.S |
| Stefan Reinauer | e1133b7 | 2015-04-27 14:04:38 -0700 | [diff] [blame] | 21 | |
| 22 | endif |