Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <arch/cpu.h> |
| 18 | #include <string.h> |
| 19 | #include "southbridge/intel/lynxpoint/pch.h" |
| 20 | #include <arch/io.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 21 | #include <cpu/x86/msr.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 22 | #include "haswell.h" |
| 23 | |
| 24 | static void report_cpu_info(void) |
| 25 | { |
| 26 | struct cpuid_result cpuidr; |
| 27 | u32 i, index; |
| 28 | char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ |
| 29 | int vt, txt, aes; |
| 30 | msr_t microcode_ver; |
| 31 | const char *mode[] = {"NOT ", ""}; |
| 32 | |
| 33 | index = 0x80000000; |
| 34 | cpuidr = cpuid(index); |
| 35 | if (cpuidr.eax < 0x80000004) { |
| 36 | strcpy(cpu_string, "Platform info not available"); |
| 37 | } else { |
| 38 | u32 *p = (u32*) cpu_string; |
| 39 | for (i = 2; i <= 4 ; i++) { |
| 40 | cpuidr = cpuid(index + i); |
| 41 | *p++ = cpuidr.eax; |
| 42 | *p++ = cpuidr.ebx; |
| 43 | *p++ = cpuidr.ecx; |
| 44 | *p++ = cpuidr.edx; |
| 45 | } |
| 46 | } |
| 47 | /* Skip leading spaces in CPU name string */ |
| 48 | while (cpu_name[0] == ' ') |
| 49 | cpu_name++; |
| 50 | |
| 51 | microcode_ver.lo = 0; |
| 52 | microcode_ver.hi = 0; |
| 53 | wrmsr(0x8B, microcode_ver); |
| 54 | cpuidr = cpuid(1); |
| 55 | microcode_ver = rdmsr(0x8b); |
| 56 | printk(BIOS_DEBUG, "CPU id(%x) ucode:%08x %s\n", cpuidr.eax, microcode_ver.hi, cpu_name); |
| 57 | aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; |
| 58 | txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; |
| 59 | vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; |
| 60 | printk(BIOS_DEBUG, "AES %ssupported, TXT %ssupported, VT %ssupported\n", |
| 61 | mode[aes], mode[txt], mode[vt]); |
| 62 | } |
| 63 | |
| 64 | /* The PCI id name match comes from Intel document 472178 */ |
| 65 | static struct { |
| 66 | u16 dev_id; |
| 67 | const char *dev_name; |
| 68 | } pch_table [] = { |
| 69 | {0x8c41, "Mobile Engineering Sample"}, |
| 70 | {0x8c42, "Desktop Engineering Sample"}, |
Aaron Durbin | f72ad02 | 2012-11-02 09:19:43 -0500 | [diff] [blame] | 71 | {0x8c44, "Z87"}, |
| 72 | {0x8c46, "Z85"}, |
| 73 | {0x8c49, "HM86"}, |
| 74 | {0x8c4a, "H87"}, |
| 75 | {0x8c4b, "HM87"}, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 76 | {0x8c4c, "Q85"}, |
| 77 | {0x8c4e, "Q87"}, |
| 78 | {0x8c4f, "QM87"}, |
| 79 | {0x8c50, "B85"}, |
| 80 | {0x8c52, "C222"}, |
| 81 | {0x8c54, "C224"}, |
| 82 | {0x8c56, "C226"}, |
| 83 | {0x8c5c, "H81"}, |
Duncan Laurie | ce36b12 | 2013-01-10 13:23:48 -0800 | [diff] [blame] | 84 | {0x9c41, "LP Full Featured Engineering Sample"}, |
| 85 | {0x9c43, "LP Premium"}, |
| 86 | {0x9c45, "LP Mainstream"}, |
| 87 | {0x9c47, "LP Value"}, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 88 | }; |
| 89 | |
| 90 | static void report_pch_info(void) |
| 91 | { |
| 92 | int i; |
| 93 | u16 dev_id = pci_read_config16(PCH_LPC_DEV, 2); |
| 94 | |
| 95 | |
| 96 | const char *pch_type = "Unknown"; |
| 97 | for (i = 0; i < ARRAY_SIZE(pch_table); i++) { |
| 98 | if (pch_table[i].dev_id == dev_id) { |
| 99 | pch_type = pch_table[i].dev_name; |
| 100 | break; |
| 101 | } |
| 102 | } |
| 103 | printk (BIOS_DEBUG, "PCH type: %s, device id: %x, rev id %x\n", |
| 104 | pch_type, dev_id, pci_read_config8(PCH_LPC_DEV, 8)); |
| 105 | } |
| 106 | |
| 107 | void report_platform_info(void) |
| 108 | { |
| 109 | report_cpu_info(); |
| 110 | report_pch_info(); |
| 111 | } |