Patrick Georgi | 2efc880 | 2012-11-06 11:03:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 secunet Security Networks AG |
| 5 | * (Written by Nico Huber <nico.huber@secunet.com> for secunet) |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Patrick Georgi | 2efc880 | 2012-11-06 11:03:53 +0100 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <stdint.h> |
| 18 | #include <delay.h> |
| 19 | #include <console/console.h> |
| 20 | #include "gm45.h" |
| 21 | |
| 22 | static const int ddr3_lookup_schedule[6][2] = { |
| 23 | { 0, 1 }, { 2, 3 }, { 4, 5 }, { 4, 5 }, { 6, 7 }, { 6, 7 } |
| 24 | }; |
| 25 | /* Look-up table: |
| 26 | * a1step X idx X (group || pull-up/-down) |
| 27 | */ |
| 28 | static const u8 ddr3_lut[2][64][8] = { |
| 29 | { /* Stepping B3 and below. */ |
| 30 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 31 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 32 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 33 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 34 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 35 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 36 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 37 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 38 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 39 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 40 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 41 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 42 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 43 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 44 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 45 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 46 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 47 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 48 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 49 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 50 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 51 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 52 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 53 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 54 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 55 | { 8, 8, 3, 3, 3, 3, 5, 7 }, |
| 56 | { 9, 9, 3, 3, 3, 3, 6, 7 }, |
| 57 | { 9, 9, 3, 3, 3, 3, 6, 7 }, |
| 58 | { 10, 10, 3, 3, 3, 3, 7, 8 }, |
| 59 | { 11, 10, 3, 3, 3, 3, 7, 8 }, |
| 60 | { 12, 11, 3, 3, 3, 3, 8, 9 }, |
| 61 | { 13, 11, 3, 3, 3, 3, 9, 9 }, |
| 62 | { 14, 12, 3, 3, 3, 3, 9, 10 }, |
| 63 | { 15, 13, 3, 3, 3, 3, 9, 10 }, |
| 64 | { 16, 14, 3, 3, 3, 3, 9, 11 }, |
| 65 | { 18, 16, 3, 3, 3, 3, 10, 12 }, |
| 66 | { 20, 18, 4, 3, 4, 4, 10, 12 }, |
| 67 | { 22, 22, 4, 4, 4, 4, 11, 12 }, |
| 68 | { 24, 24, 4, 4, 4, 4, 11, 12 }, |
| 69 | { 28, 26, 4, 4, 4, 4, 12, 12 }, |
| 70 | { 32, 28, 5, 4, 5, 5, 12, 12 }, |
| 71 | { 36, 32, 5, 5, 5, 5, 13, 13 }, |
| 72 | { 40, 36, 5, 5, 5, 5, 14, 13 }, |
| 73 | { 43, 40, 5, 5, 5, 5, 15, 14 }, |
| 74 | { 43, 43, 5, 5, 6, 5, 15, 14 }, |
| 75 | { 43, 43, 6, 5, 6, 5, 15, 15 }, |
| 76 | { 43, 43, 6, 5, 6, 6, 15, 15 }, |
| 77 | { 43, 43, 6, 6, 6, 6, 15, 15 }, |
| 78 | { 43, 43, 6, 6, 7, 6, 15, 15 }, |
| 79 | { 43, 43, 7, 6, 7, 6, 15, 15 }, |
| 80 | { 43, 43, 7, 7, 7, 7, 15, 15 }, |
| 81 | { 43, 43, 7, 7, 7, 7, 15, 15 }, |
| 82 | { 43, 43, 7, 7, 7, 7, 15, 15 }, |
| 83 | { 43, 43, 8, 7, 8, 7, 15, 15 }, |
| 84 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 85 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 86 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 87 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 88 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 89 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 90 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 91 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 92 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 93 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 94 | }, |
| 95 | { /* Stepping A1 and above. */ |
| 96 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 97 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 98 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 99 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 100 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 101 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 102 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 103 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 104 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 105 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 106 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 107 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 108 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 109 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 110 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 111 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 112 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 113 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 114 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 115 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 116 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 117 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 118 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 119 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 120 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 121 | { 8, 8, 3, 3, 3, 3, 5, 5 }, |
| 122 | { 9, 9, 3, 3, 3, 3, 6, 6 }, |
| 123 | { 9, 9, 3, 3, 3, 3, 6, 6 }, |
| 124 | { 10, 10, 3, 3, 3, 3, 7, 7 }, |
| 125 | { 10, 10, 3, 3, 3, 3, 7, 7 }, |
| 126 | { 12, 11, 3, 3, 3, 3, 8, 8 }, |
| 127 | { 13, 11, 3, 3, 3, 3, 9, 9 }, |
| 128 | { 14, 12, 3, 3, 3, 3, 9, 9 }, |
| 129 | { 15, 13, 3, 3, 3, 3, 9, 9 }, |
| 130 | { 16, 14, 3, 3, 3, 3, 9, 9 }, |
| 131 | { 18, 16, 3, 3, 3, 3, 10, 10 }, |
| 132 | { 20, 18, 4, 3, 4, 4, 10, 10 }, |
| 133 | { 22, 22, 4, 4, 4, 4, 11, 11 }, |
| 134 | { 24, 24, 4, 4, 4, 4, 11, 11 }, |
| 135 | { 28, 26, 4, 4, 4, 4, 12, 12 }, |
| 136 | { 32, 28, 5, 4, 5, 5, 12, 12 }, |
| 137 | { 36, 32, 5, 5, 5, 5, 13, 13 }, |
| 138 | { 40, 36, 5, 5, 5, 5, 14, 14 }, |
| 139 | { 43, 40, 5, 5, 5, 5, 15, 15 }, |
| 140 | { 43, 43, 5, 5, 6, 5, 15, 15 }, |
| 141 | { 43, 43, 6, 5, 6, 5, 15, 15 }, |
| 142 | { 43, 43, 6, 5, 6, 6, 15, 15 }, |
| 143 | { 43, 43, 6, 6, 6, 6, 15, 15 }, |
| 144 | { 43, 43, 6, 6, 7, 6, 15, 15 }, |
| 145 | { 43, 43, 7, 6, 7, 6, 15, 15 }, |
| 146 | { 43, 43, 7, 7, 7, 7, 15, 15 }, |
| 147 | { 43, 43, 7, 7, 7, 7, 15, 15 }, |
| 148 | { 43, 43, 7, 7, 7, 7, 15, 15 }, |
| 149 | { 43, 43, 8, 7, 8, 7, 15, 15 }, |
| 150 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 151 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 152 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 153 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 154 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 155 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 156 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 157 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 158 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 159 | { 43, 43, 8, 8, 8, 8, 15, 15 }, |
| 160 | } |
| 161 | }; |
| 162 | static void lookup_and_write(const int a1step, |
| 163 | const int row, const int col, |
| 164 | unsigned int mchbar) |
| 165 | { |
| 166 | int i; |
| 167 | |
| 168 | /* Write 4 32-bit registers, 4 values each. */ |
| 169 | for (i = row; i < row + 16; i += 4) { |
| 170 | MCHBAR32(mchbar) = |
| 171 | ((ddr3_lut[a1step][i + 0][col] & 0x3f) << 0) | |
| 172 | ((ddr3_lut[a1step][i + 1][col] & 0x3f) << 8) | |
| 173 | ((ddr3_lut[a1step][i + 2][col] & 0x3f) << 16) | |
| 174 | ((ddr3_lut[a1step][i + 3][col] & 0x3f) << 24); |
| 175 | mchbar += 4; |
| 176 | } |
| 177 | } |
| 178 | void raminit_rcomp_calibration(const stepping_t stepping) { |
| 179 | const int a1step = stepping >= STEPPING_CONVERSION_A1; |
| 180 | |
| 181 | int i; |
| 182 | |
| 183 | enum { |
| 184 | PULL_UP = 0, |
| 185 | PULL_DOWN = 1, |
| 186 | }; |
| 187 | /* channel X group X pull-up/-down */ |
| 188 | char lut_idx[2][6][2]; |
| 189 | for (i = 0; i < 2 * 6 * 2; ++i) |
| 190 | ((char *)lut_idx)[i] = -1; |
| 191 | |
| 192 | MCHBAR32(0x400) |= (1 << 2); |
| 193 | MCHBAR32(0x418) |= (1 << 17); |
| 194 | MCHBAR32(0x40c) &= ~(1 << 23); |
| 195 | MCHBAR32(0x41c) &= ~((1 << 7) | (1 << 3)); |
| 196 | MCHBAR32(0x400) |= 1; |
| 197 | |
| 198 | /* Read lookup indices. */ |
| 199 | for (i = 0; i < 12; ++i) { |
| 200 | do { |
| 201 | MCHBAR32(0x400) |= (1 << 3); |
| 202 | udelay(10); |
| 203 | MCHBAR32(0x400) &= ~(1 << 3); |
| 204 | } while ((MCHBAR32(0x530) & 0x7) != 0x4); |
| 205 | u32 reg = MCHBAR32(0x400); |
| 206 | const unsigned int group = (reg >> 13) & 0x7; |
| 207 | const unsigned int channel = (reg >> 12) & 0x1; |
| 208 | if (group > 5) |
| 209 | break; |
| 210 | reg = MCHBAR32(0x518); |
| 211 | lut_idx[channel][group][PULL_UP] = (reg >> 24) & 0x7f; |
| 212 | lut_idx[channel][group][PULL_DOWN] = (reg >> 16) & 0x7f; |
| 213 | } |
| 214 | /* Cleanup? */ |
| 215 | MCHBAR32(0x400) |= (1 << 3); |
| 216 | udelay(10); |
| 217 | MCHBAR32(0x400) &= ~(1 << 3); |
| 218 | MCHBAR32(0x400) &= ~(1 << 2); |
| 219 | |
| 220 | /* Check for consistency. */ |
| 221 | for (i = 0; i < 2 * 6 * 2; ++i) { |
| 222 | const char idx = ((char *)lut_idx)[i]; |
| 223 | if ((idx < 7) || (idx > 55)) |
| 224 | die("Bad RCOMP calibration lookup index.\n"); |
| 225 | } |
| 226 | |
| 227 | /* Lookup values and fill registers. */ |
| 228 | int channel, group, pu_pd; |
| 229 | unsigned int mchbar = 0x0680; |
| 230 | for (channel = 0; channel < 2; ++channel) { |
| 231 | for (group = 0; group < 6; ++group) { |
| 232 | for (pu_pd = PULL_DOWN; pu_pd >= PULL_UP; --pu_pd) { |
| 233 | lookup_and_write( |
| 234 | a1step, |
| 235 | lut_idx[channel][group][pu_pd] - 7, |
| 236 | ddr3_lookup_schedule[group][pu_pd], |
| 237 | mchbar); |
| 238 | mchbar += 0x0018; |
| 239 | } |
| 240 | mchbar += 0x0010; |
| 241 | /* Channel B knows only the first two groups. */ |
| 242 | if ((1 == channel) && (1 == group)) |
| 243 | break; |
| 244 | } |
| 245 | mchbar += 0x0040; |
| 246 | } |
| 247 | } |