Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 3 | * |
Marc Jones | aee0796 | 2008-07-16 21:09:31 +0000 | [diff] [blame] | 4 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. |
Timothy Pearson | 7c55f37 | 2015-08-02 21:36:24 -0500 | [diff] [blame] | 5 | * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | |
| 18 | #ifndef H3FFEAT_H |
| 19 | #define H3FFEAT_H |
| 20 | |
| 21 | /*---------------------------------------------------------------------------- |
| 22 | * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS) |
| 23 | * |
| 24 | *---------------------------------------------------------------------------- |
| 25 | */ |
| 26 | |
| 27 | /*----------------------------------------------------------------------------- |
| 28 | * DEFINITIONS AND MACROS |
| 29 | * |
| 30 | *----------------------------------------------------------------------------- |
| 31 | */ |
| 32 | |
| 33 | #define MAX_NODES 8 |
| 34 | #define MAX_LINKS 8 |
| 35 | #define MAX_PLATFORM_LINKS 64 /* 8x8 fully connected (28) + 4 chains with two HT devices */ |
| 36 | |
| 37 | /* These following are internal definitions */ |
| 38 | #define ROUTETOSELF 0x0F |
| 39 | #define INVALID_LINK 0xCC /* Used in port list data structure to mark unused data entries. |
| 40 | Can also be used for no link found in a port list search */ |
| 41 | |
| 42 | /* definitions for working with the port list structure */ |
| 43 | #define PORTLIST_TYPE_CPU 0 |
| 44 | #define PORTLIST_TYPE_IO 1 |
| 45 | |
| 46 | /* |
| 47 | * Hypertransport Capability definitions and macros |
| 48 | * |
| 49 | */ |
| 50 | |
| 51 | /* HT Host Capability */ |
| 52 | /* bool isHTHostCapability(u32 reg) */ |
| 53 | #define IS_HT_HOST_CAPABILITY(reg) \ |
| 54 | ((reg & (u32)0xE00000FF) == (u32)0x20000008) |
| 55 | |
| 56 | #define HT_HOST_CAP_SIZE 0x20 |
| 57 | |
| 58 | /* Host CapabilityRegisters */ |
| 59 | #define HTHOST_LINK_CAPABILITY_REG 0x00 |
| 60 | #define HTHOST_LINK_CONTROL_REG 0x04 |
| 61 | #define HTHOST_FREQ_REV_REG 0x08 |
Timothy Pearson | 7c55f37 | 2015-08-02 21:36:24 -0500 | [diff] [blame] | 62 | #define HTHOST_FREQ_REV_REG_2 0x1c |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 63 | #define HT_HOST_REV_REV3 0x60 |
| 64 | #define HTHOST_FEATURE_CAP_REG 0x0C |
| 65 | #define HTHOST_BUFFER_COUNT_REG 0x10 |
| 66 | #define HTHOST_ISOC_REG 0x14 |
| 67 | #define HTHOST_LINK_TYPE_REG 0x18 |
| 68 | #define HTHOST_TYPE_COHERENT 3 |
| 69 | #define HTHOST_TYPE_NONCOHERENT 7 |
| 70 | #define HTHOST_TYPE_MASK 0x1F |
| 71 | |
| 72 | /* HT Slave Capability (HT1 compat) */ |
| 73 | #define IS_HT_SLAVE_CAPABILITY(reg) \ |
| 74 | ((reg & (u32)0xE00000FF) == (u32)0x00000008) |
| 75 | #define HTSLAVE_LINK01_OFFSET 4 |
| 76 | #define HTSLAVE_LINK_CONTROL_0_REG 4 |
| 77 | #define HTSLAVE_FREQ_REV_0_REG 0xC |
Timothy Pearson | 50001b8 | 2015-08-11 17:47:48 -0500 | [diff] [blame] | 78 | #define HTSLAVE_FEATURE_CAP_REG 0x10 |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 79 | |
| 80 | /* HT3 gen Capability */ |
| 81 | #define IS_HT_GEN3_CAPABILITY(reg) \ |
| 82 | ((reg & (u32)0xF80000FF) == (u32)0xD0000008) |
| 83 | #define HTGEN3_LINK01_OFFSET 0x10 |
| 84 | #define HTGEN3_LINK_TRAINING_0_REG 0x10 |
| 85 | |
| 86 | /* HT3 Retry Capability */ |
| 87 | #define IS_HT_RETRY_CAPABILITY(reg) \ |
| 88 | ((reg & (u32)0xF80000FF) == (u32)0xC0000008) |
| 89 | |
| 90 | #define HTRETRY_CONTROL_REG 4 |
| 91 | |
| 92 | /* Unit ID Clumping Capability */ |
| 93 | #define IS_HT_UNITID_CAPABILITY(reg) \ |
| 94 | ((reg & (u32)0xF80000FF) == (u32)0x90000008) |
| 95 | |
| 96 | #define HTUNIT_SUPPORT_REG 4 |
| 97 | #define HTUNIT_ENABLE_REG 8 |
| 98 | |
| 99 | /*---------------------------------------------------------------------------- |
| 100 | * TYPEDEFS, STRUCTURES, ENUMS |
| 101 | * |
| 102 | *---------------------------------------------------------------------------- |
| 103 | */ |
| 104 | |
| 105 | typedef struct cNorthBridge cNorthBridge; |
| 106 | |
| 107 | /* A pair consists of a source node, a link to the destination node, the |
| 108 | * destination node, and its link back to source node. The even indices are |
| 109 | * the source nodes and links, and the odd indices are for the destination |
| 110 | * nodes and links. |
| 111 | */ |
| 112 | typedef struct |
| 113 | { |
| 114 | /* This section is where the link is in the system and how to find it */ |
| 115 | u8 Type; /* 0 = CPU, 1 = Device, all others reserved */ |
| 116 | u8 Link; /* 0-1 for devices, 0-7 for CPUs */ |
| 117 | u8 NodeID; /* The node, or a pointer to the devices parent node */ |
| 118 | u8 HostLink, HostDepth; /* Link of parent node + depth in chain. Only used by devices */ |
| 119 | SBDFO Pointer; /* A pointer to the device's slave HT capability, so we don't have to keep searching */ |
| 120 | |
| 121 | /* This section is for the final settings, which are written to hardware */ |
| 122 | BOOL SelRegang; /* Only used for CPU->CPU links */ |
| 123 | u8 SelWidthIn; |
| 124 | u8 SelWidthOut; |
| 125 | u8 SelFrequency; |
Timothy Pearson | 50001b8 | 2015-08-11 17:47:48 -0500 | [diff] [blame] | 126 | uint8_t enable_isochronous_mode; |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 127 | |
| 128 | /* This section is for keeping track of capabilities and possible configurations */ |
| 129 | BOOL RegangCap; |
Timothy Pearson | 7c55f37 | 2015-08-02 21:36:24 -0500 | [diff] [blame] | 130 | uint32_t PrvFrequencyCap; |
Timothy Pearson | 50001b8 | 2015-08-11 17:47:48 -0500 | [diff] [blame] | 131 | uint32_t PrvFeatureCap; |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 132 | u8 PrvWidthInCap; |
| 133 | u8 PrvWidthOutCap; |
Timothy Pearson | 7c55f37 | 2015-08-02 21:36:24 -0500 | [diff] [blame] | 134 | uint32_t CompositeFrequencyCap; |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 135 | |
| 136 | } sPortDescriptor; |
| 137 | |
| 138 | |
| 139 | /* |
| 140 | * Our global state data structure |
| 141 | */ |
| 142 | typedef struct { |
| 143 | AMD_HTBLOCK *HtBlock; |
| 144 | |
| 145 | u8 NodesDiscovered; /* One less than the number of nodes found in the system */ |
| 146 | u8 TotalLinks; |
| 147 | u8 sysMpCap; /* The maximum number of nodes that all processors are capable of */ |
| 148 | |
| 149 | /* Two ports for each link |
| 150 | * Note: The Port pair 2*N and 2*N+1 are connected together to form a link |
| 151 | * (e.g. 0,1 and 8,9 are ports on either end of an HT link) The lower number |
| 152 | * port (2*N) is the source port. The device that owns the source port is |
| 153 | * always the device closer to the BSP. (i.e. nearer the CPU in a |
| 154 | * non-coherent chain, or the CPU with the lower NodeID). |
| 155 | */ |
| 156 | sPortDescriptor PortList[MAX_PLATFORM_LINKS*2]; |
| 157 | |
| 158 | /* The number of coherent links comming off of each node (i.e. the 'Degree' of the node) */ |
| 159 | u8 sysDegree[MAX_NODES]; |
| 160 | /* The systems adjency (sysMatrix[i][j] is true if Node_i has a link to Node_j) */ |
| 161 | BOOL sysMatrix[MAX_NODES][MAX_NODES]; |
| 162 | |
| 163 | /* Same as above, but for the currently selected database entry */ |
| 164 | u8 dbDegree[MAX_NODES]; |
| 165 | BOOL dbMatrix[MAX_NODES][MAX_NODES]; |
| 166 | |
| 167 | u8 Perm[MAX_NODES]; /* The node mapping from the database to the system */ |
| 168 | u8 ReversePerm[MAX_NODES]; /* The node mapping from the system to the database */ |
| 169 | |
| 170 | /* Data for non-coherent initilization */ |
| 171 | u8 AutoBusCurrent; |
| 172 | u8 UsedCfgMapEntires; |
| 173 | |
| 174 | /* 'This' pointer for northbridge */ |
| 175 | cNorthBridge *nb; |
| 176 | } sMainData; |
| 177 | |
| 178 | #endif /* H3FFEAT_H */ |