| Alexandru Gagniuc | 37a8a8b | 2013-05-21 14:51:26 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com> |
| 5 | * |
| 6 | * This program is free software: you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation, either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| Alexandru Gagniuc | 37a8a8b | 2013-05-21 14:51:26 -0500 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <arch/pirq_routing.h> |
| 18 | #include <console/console.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <string.h> /* <- For memset */ |
| 21 | |
| 22 | #define _OFF 0x00 |
| 23 | #define ___OFF 0x0000 |
| 24 | #define LNKA 1 |
| 25 | #define LNKB 2 |
| 26 | #define LNKC 3 |
| 27 | #define LNKD 4 |
| 28 | #define LNKE 5 |
| 29 | #define LNKF 6 |
| 30 | #define LNKG 7 |
| 31 | #define LNKH 8 |
| 32 | #define BITMAP 0xdce0 |
| 33 | /* The link that carries the SATA interrupt has its own mask, just in case |
| 34 | * we want to make sure our SATA controller gets mapped to IRQ 14 */ |
| 35 | #define B_SATA BITMAP |
| 36 | |
| 37 | const struct irq_routing_table intel_irq_routing_table = { |
| 38 | PIRQ_SIGNATURE, /* u32 signature */ |
| 39 | PIRQ_VERSION, /* u16 version */ |
| 40 | 32 + 16 * 13, /* Max. number of devices on the bus */ |
| 41 | 0x00, /* Interrupt router bus */ |
| 42 | (0x11 << 3) | 0x0, /* Interrupt router dev */ |
| 43 | 0, /* IRQs devoted exclusively for PCI */ |
| 44 | PCI_VENDOR_ID_VIA, /* Vendor */ |
| 45 | PCI_DEVICE_ID_VIA_VX900_LPC, /* Device */ |
| 46 | 0, /* Miniport */ |
| 47 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ |
| 48 | 0x19, /* Checksum (has to be set to some value that |
| 49 | * would give 0 after the sum of all bytes |
| 50 | * for this structure (including checksum). */ |
| 51 | { |
| 52 | /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| 53 | {0x00, (0x01 << 3) | 0x0, {{LNKH, BITMAP}, {LNKH, BITMAP}, {_OFF, ___OFF}, {_OFF, ___OFF}}, 0x0, 0x0}, |
| 54 | {0x00, (0x03 << 3) | 0x0, {{LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}}, 0x0, 0x0}, |
| 55 | {0x00, (0x0a << 3) | 0x0, {{LNKA, BITMAP}, {LNKB, B_SATA}, {LNKC, BITMAP}, {LNKD, BITMAP}}, 0x0, 0x0}, |
| 56 | {0x00, (0x0b << 3) | 0x0, {{LNKA, BITMAP}, {_OFF, ___OFF}, {_OFF, ___OFF}, {_OFF, ___OFF}}, 0x0, 0x0}, |
| 57 | {0x00, (0x0c << 3) | 0x0, {{LNKA, BITMAP}, {_OFF, ___OFF}, {_OFF, ___OFF}, {_OFF, ___OFF}}, 0x0, 0x0}, |
| 58 | {0x00, (0x0d << 3) | 0x0, {{LNKA, BITMAP}, {_OFF, ___OFF}, {_OFF, ___OFF}, {_OFF, ___OFF}}, 0x0, 0x0}, |
| 59 | {0x00, (0x0f << 3) | 0x0, {{LNKB, B_SATA}, {_OFF, ___OFF}, {_OFF, ___OFF}, {_OFF, ___OFF}}, 0x0, 0x0}, |
| 60 | {0x00, (0x10 << 3) | 0x0, {{LNKA, BITMAP}, {LNKB, B_SATA}, {LNKC, BITMAP}, {LNKD, BITMAP}}, 0x0, 0x0}, |
| 61 | {0x00, (0x14 << 3) | 0x0, {{LNKB, B_SATA}, {_OFF, ___OFF}, {_OFF, ___OFF}, {_OFF, ___OFF}}, 0x0, 0x0}, |
| 62 | {0x01, (0x00 << 3) | 0x0, {{LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}}, 0x1, 0x0}, |
| 63 | {0x02, (0x00 << 3) | 0x0, {{LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}}, 0x2, 0x0}, |
| 64 | {0x03, (0x00 << 3) | 0x0, {{LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}}, 0x0, 0x0}, |
| 65 | {0x04, (0x00 << 3) | 0x0, {{LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}, {LNKH, BITMAP}}, 0x0, 0x0}, |
| 66 | } |
| 67 | }; |
| 68 | |
| 69 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 70 | { |
| 71 | return copy_pirq_routing_table(addr, &intel_irq_routing_table); |
| 72 | } |