Libra Li | 4cede71 | 2009-11-25 07:48:24 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2009 Libra Li <libra.li@technexion.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Libra Li | 4cede71 | 2009-11-25 07:48:24 +0000 | [diff] [blame] | 15 | */ |
Libra Li | 031029d | 2009-11-09 11:53:41 +0000 | [diff] [blame] | 16 | |
Libra Li | 4cede71 | 2009-11-25 07:48:24 +0000 | [diff] [blame] | 17 | |
| 18 | #ifdef __PRE_RAM__ |
Libra Li | 031029d | 2009-11-09 11:53:41 +0000 | [diff] [blame] | 19 | |
| 20 | #include <arch/cpu.h> |
| 21 | #include "southbridge/amd/sb600/sb600.h" |
| 22 | |
| 23 | #else |
| 24 | |
| 25 | #include <device/pci.h> |
| 26 | #include <device/pci_ids.h> |
| 27 | |
| 28 | #endif |
| 29 | |
| 30 | #include "tn_post_code.h" |
| 31 | |
| 32 | |
Libra Li | 4cede71 | 2009-11-25 07:48:24 +0000 | [diff] [blame] | 33 | #ifdef __PRE_RAM__ |
Libra Li | 031029d | 2009-11-09 11:53:41 +0000 | [diff] [blame] | 34 | |
| 35 | // TechNexion's Post Code Initially. |
| 36 | void technexion_post_code_init(void) |
| 37 | { |
| 38 | uint8_t reg8_data; |
| 39 | device_t dev=0; |
| 40 | |
| 41 | // SMBus Module and ACPI Block (Device 20, Function 0) |
| 42 | dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0); |
| 43 | |
| 44 | // LED[bit0]:GPIO0 |
| 45 | // This is reference SB600 RRG 4.1.1 GPIO |
| 46 | reg8_data = pmio_read(0x60); |
| 47 | reg8_data |= (1<<7); // 1: GPIO if not used by SATA |
| 48 | pmio_write(0x60, reg8_data); |
| 49 | |
| 50 | reg8_data = pci_read_config8(dev, 0x80); |
| 51 | reg8_data = ((reg8_data | (1<<0)) & ~(1<<4)); |
| 52 | pci_write_config8(dev, 0x80, reg8_data); |
| 53 | |
| 54 | // LED[bit1]:GPIO1 |
| 55 | // This is reference SB600 RRG 4.1.1 GPIO |
| 56 | reg8_data = pci_read_config8(dev, 0x80); |
| 57 | reg8_data = ((reg8_data | (1<<1)) & ~(1<<5)); |
| 58 | pci_write_config8(dev, 0x80, reg8_data); |
| 59 | |
| 60 | // LED[bit2]:GPIO4 |
| 61 | // This is reference SB600 RRG 4.1.1 GPIO |
| 62 | reg8_data = pmio_read(0x5e); |
| 63 | reg8_data &= ~(1<<7); // 0: GPIO if not used by SATA |
| 64 | pmio_write(0x5e, reg8_data); |
| 65 | |
| 66 | reg8_data = pci_read_config8(dev, 0xa8); |
| 67 | reg8_data |= (1<<0); |
| 68 | pci_write_config8(dev, 0xa8, reg8_data); |
| 69 | |
| 70 | reg8_data = pci_read_config8(dev, 0xa9); |
| 71 | reg8_data &= ~(1<<0); |
| 72 | pci_write_config8(dev, 0xa9, reg8_data); |
| 73 | |
| 74 | // LED[bit3]:GPIO6 |
| 75 | // This is reference SB600 RRG 4.1.1 GPIO |
| 76 | reg8_data = pmio_read(0x60); |
| 77 | reg8_data |= (1<<7); // 1: GPIO if not used by SATA |
| 78 | pmio_write(0x60, reg8_data); |
| 79 | |
| 80 | reg8_data = pci_read_config8(dev, 0xa8); |
| 81 | reg8_data |= (1<<2); |
| 82 | pci_write_config8(dev, 0xa8, reg8_data); |
| 83 | |
| 84 | reg8_data = pci_read_config8(dev, 0xa9); |
| 85 | reg8_data &= ~(1<<2); |
| 86 | pci_write_config8(dev, 0xa9, reg8_data); |
| 87 | // LED[bit4]:GPIO7 |
| 88 | // This is reference SB600 RRG 4.1.1 GPIO |
| 89 | reg8_data = pci_read_config8(dev, 0xa8); |
| 90 | reg8_data |= (1<<3); |
| 91 | pci_write_config8(dev, 0xa8, reg8_data); |
| 92 | |
| 93 | reg8_data = pci_read_config8(dev, 0xa9); |
| 94 | reg8_data &= ~(1<<3); |
| 95 | pci_write_config8(dev, 0xa9, reg8_data); |
| 96 | |
| 97 | // LED[bit5]:GPIO8 |
| 98 | // This is reference SB600 RRG 4.1.1 GPIO |
| 99 | reg8_data = pci_read_config8(dev, 0xa8); |
| 100 | reg8_data |= (1<<4); |
| 101 | pci_write_config8(dev, 0xa8, reg8_data); |
| 102 | |
| 103 | reg8_data = pci_read_config8(dev, 0xa9); |
| 104 | reg8_data &= ~(1<<4); |
| 105 | pci_write_config8(dev, 0xa9, reg8_data); |
| 106 | |
| 107 | // LED[bit6]:GPIO10 |
| 108 | // This is reference SB600 RRG 4.1.1 GPIO |
| 109 | reg8_data = pci_read_config8(dev, 0xab); |
| 110 | reg8_data = ((reg8_data | (1<<0)) & ~(1<<1)); |
| 111 | pci_write_config8(dev, 0xab, reg8_data); |
| 112 | |
| 113 | // LED[bit7]:GPIO66 |
| 114 | // This is reference SB600 RRG 4.1.1 GPIO |
| 115 | reg8_data = pmio_read(0x68); |
| 116 | reg8_data &= ~(1<<5); // 0: GPIO |
| 117 | pmio_write(0x68, reg8_data); |
| 118 | |
| 119 | reg8_data = pci_read_config8(dev, 0x7e); |
| 120 | reg8_data = ((reg8_data | (1<<1)) & ~(1<<5)); |
| 121 | pci_write_config8(dev, 0x7e, reg8_data); |
| 122 | |
| 123 | } |
| 124 | |
| 125 | #endif |
| 126 | |
| 127 | /* TechNexion's Post Code. |
| 128 | */ |
| 129 | void technexion_post_code(uint8_t udata8) |
| 130 | { |
| 131 | uint8_t u8_data; |
| 132 | device_t dev=0; |
| 133 | |
| 134 | // SMBus Module and ACPI Block (Device 20, Function 0) |
Libra Li | 4cede71 | 2009-11-25 07:48:24 +0000 | [diff] [blame] | 135 | #ifdef __PRE_RAM__ |
Libra Li | 031029d | 2009-11-09 11:53:41 +0000 | [diff] [blame] | 136 | dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0); |
| 137 | #else |
| 138 | dev = dev_find_device(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM, 0); |
| 139 | #endif |
| 140 | |
| 141 | udata8 = ~(udata8); |
| 142 | |
| 143 | // LED[bit0]:GPIO0 |
| 144 | u8_data = pci_read_config8(dev, 0x80); |
| 145 | if (udata8 & 0x1) { |
| 146 | u8_data |= (1<<0); |
| 147 | } |
| 148 | else { |
| 149 | u8_data &= ~(1<<0); |
| 150 | } |
| 151 | pci_write_config8(dev, 0x80, u8_data); |
| 152 | |
| 153 | // LED[bit1]:GPIO1 |
| 154 | u8_data = pci_read_config8(dev, 0x80); |
| 155 | if (udata8 & 0x2) { |
| 156 | u8_data |= (1<<1); |
| 157 | } |
| 158 | else { |
| 159 | u8_data &= ~(1<<1); |
| 160 | } |
| 161 | pci_write_config8(dev, 0x80, u8_data); |
| 162 | |
| 163 | // LED[bit2]:GPIO4 |
| 164 | u8_data = pci_read_config8(dev, 0xa8); |
| 165 | if (udata8 & 0x4) { |
| 166 | u8_data |= (1<<0); |
| 167 | } |
| 168 | else { |
| 169 | u8_data &= ~(1<<0); |
| 170 | } |
| 171 | pci_write_config8(dev, 0xa8, u8_data); |
| 172 | |
| 173 | // LED[bit3]:GPIO6 |
| 174 | u8_data = pci_read_config8(dev, 0xa8); |
| 175 | if (udata8 & 0x8) { |
| 176 | u8_data |= (1<<2); |
| 177 | } |
| 178 | else { |
| 179 | u8_data &= ~(1<<2); |
| 180 | } |
| 181 | pci_write_config8(dev, 0xa8, u8_data); |
| 182 | |
| 183 | // LED[bit4]:GPIO7 |
| 184 | u8_data = pci_read_config8(dev, 0xa8); |
| 185 | if (udata8 & 0x10) { |
| 186 | u8_data |= (1<<3); |
| 187 | } |
| 188 | else { |
| 189 | u8_data &= ~(1<<3); |
| 190 | } |
| 191 | pci_write_config8(dev, 0xa8, u8_data); |
| 192 | |
| 193 | // LED[bit5]:GPIO8 |
| 194 | u8_data = pci_read_config8(dev, 0xa8); |
| 195 | if (udata8 & 0x20) { |
| 196 | u8_data |= (1<<4); |
| 197 | } |
| 198 | else { |
| 199 | u8_data &= ~(1<<4); |
| 200 | } |
| 201 | pci_write_config8(dev, 0xa8, u8_data); |
| 202 | |
| 203 | // LED[bit6]:GPIO10 |
| 204 | u8_data = pci_read_config8(dev, 0xab); |
| 205 | if (udata8 & 0x40) { |
| 206 | u8_data |= (1<<0); |
| 207 | } |
| 208 | else { |
| 209 | u8_data &= ~(1<<0); |
| 210 | } |
| 211 | pci_write_config8(dev, 0xab, u8_data); |
| 212 | |
| 213 | // LED[bit7]:GPIO66 |
| 214 | u8_data = pci_read_config8(dev, 0x7e); |
| 215 | if (udata8 & 0x80) { |
| 216 | u8_data |= (1<<1); |
| 217 | } |
| 218 | else { |
| 219 | u8_data &= ~(1<<1); |
| 220 | } |
| 221 | pci_write_config8(dev, 0x7e, u8_data); |
| 222 | |
| 223 | } |