Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 1 | #include <console/console.h> |
| 2 | #include <device/pci.h> |
| 3 | #include <device/pci_ids.h> |
| 4 | #include <string.h> |
| 5 | #include <stdint.h> |
Stefan Reinauer | 9a16e3e | 2010-03-29 14:45:36 +0000 | [diff] [blame] | 6 | #include <cpu/amd/multicore.h> |
Carl-Daniel Hailfinger | 2ee6779 | 2008-10-01 12:52:52 +0000 | [diff] [blame] | 7 | #include <stdlib.h> |
Stefan Reinauer | 23836e2 | 2010-04-15 12:39:29 +0000 | [diff] [blame] | 8 | #include <cpu/amd/amdk8_sysconf.h> |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 9 | |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 10 | // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables |
| 11 | //busnum is default |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 12 | unsigned char bus_ck804_0; //1 |
| 13 | unsigned char bus_ck804_1; //2 |
| 14 | unsigned char bus_ck804_2; //3 |
| 15 | unsigned char bus_ck804_3; //4 |
| 16 | unsigned char bus_ck804_4; //5 |
| 17 | unsigned char bus_ck804_5; //6 |
| 18 | unsigned char bus_8131_0; //7 |
| 19 | unsigned char bus_8131_1; //8 |
| 20 | unsigned char bus_8131_2; //9 |
| 21 | unsigned char bus_ck804b_0; //a |
| 22 | unsigned char bus_ck804b_1; //b |
| 23 | unsigned char bus_ck804b_2; //c |
| 24 | unsigned char bus_ck804b_3; //d |
| 25 | unsigned char bus_ck804b_4; //e |
| 26 | unsigned char bus_ck804b_5; //f |
| 27 | unsigned apicid_ck804; |
| 28 | unsigned apicid_8131_1; |
| 29 | unsigned apicid_8131_2; |
| 30 | unsigned apicid_ck804b; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 31 | |
| 32 | unsigned sblk; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 33 | unsigned pci1234[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not |
| 34 | //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail |
| 35 | 0x0000ff0, |
| 36 | 0x0000ff0, |
| 37 | 0x0000ff0, |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 38 | // 0x0000ff0, |
| 39 | // 0x0000ff0, |
| 40 | // 0x0000ff0, |
| 41 | // 0x0000ff0, |
| 42 | // 0x0000ff0 |
| 43 | }; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 44 | |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 45 | unsigned hc_possible_num; |
| 46 | unsigned sbdn; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 47 | unsigned hcdn[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 48 | 0x20202020, |
| 49 | 0x20202020, |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 50 | 0x20202020, |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 51 | // 0x20202020, |
| 52 | // 0x20202020, |
| 53 | // 0x20202020, |
| 54 | // 0x20202020, |
| 55 | // 0x20202020, |
| 56 | }; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 57 | |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 58 | unsigned sbdn3; |
| 59 | unsigned sbdnb; |
| 60 | |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 61 | static unsigned get_bus_conf_done = 0; |
| 62 | |
| 63 | void get_bus_conf(void) |
| 64 | { |
| 65 | |
| 66 | unsigned apicid_base; |
| 67 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 68 | device_t dev; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 69 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 70 | if (get_bus_conf_done == 1) |
| 71 | return; //do it only once |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 72 | |
| 73 | get_bus_conf_done = 1; |
| 74 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 75 | hc_possible_num = ARRAY_SIZE(pci1234); |
| 76 | |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 77 | get_sblk_pci1234(); |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 78 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 79 | sbdn = (hcdn[0] & 0xff); // first byte of first chain |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 80 | |
| 81 | sbdn3 = (hcdn[1] & 0xff); |
| 82 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 83 | sbdnb = (hcdn[2] & 0xff); // first byte of second chain |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 84 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 85 | // bus_ck804_0 = node_link_to_bus(0, sblk); |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 86 | bus_ck804_0 = (pci1234[0] >> 16) & 0xff; |
| 87 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 88 | /* CK804 */ |
| 89 | dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0)); |
| 90 | if (dev) { |
| 91 | bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 92 | #if 0 |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 93 | bus_ck804_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 94 | bus_ck804_2++; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 95 | #else |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 96 | bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 97 | bus_ck804_5++; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 98 | #endif |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 99 | } else { |
| 100 | printk(BIOS_DEBUG, |
| 101 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 102 | sbdn + 0x09); |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 103 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 104 | bus_ck804_1 = 2; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 105 | #if 0 |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 106 | bus_ck804_2 = 3; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 107 | #else |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 108 | bus_ck804_5 = 3; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 109 | #endif |
| 110 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 111 | } |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 112 | #if 0 |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 113 | dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0b, 0)); |
| 114 | if (dev) { |
| 115 | bus_ck804_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 116 | bus_ck804_3 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 117 | bus_ck804_3++; |
| 118 | } else { |
| 119 | printk(BIOS_DEBUG, |
| 120 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 121 | sbdn + 0x0b); |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 122 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 123 | bus_ck804_3 = bus_ck804_2 + 1; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 124 | } |
| 125 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 126 | dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0c, 0)); |
| 127 | if (dev) { |
| 128 | bus_ck804_3 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 129 | bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 130 | bus_ck804_4++; |
| 131 | } else { |
| 132 | printk(BIOS_DEBUG, |
| 133 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 134 | sbdn + 0x0c); |
| 135 | |
| 136 | bus_ck804_4 = bus_ck804_3 + 1; |
| 137 | } |
| 138 | |
| 139 | dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d, 0)); |
| 140 | if (dev) { |
| 141 | bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 142 | bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 143 | bus_ck804_5++; |
| 144 | } else { |
| 145 | printk(BIOS_DEBUG, |
| 146 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 147 | sbdn + 0x0d); |
| 148 | |
| 149 | bus_ck804_5 = bus_ck804_4 + 1; |
| 150 | } |
| 151 | #endif |
| 152 | |
| 153 | dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0)); |
| 154 | if (dev) { |
| 155 | bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 156 | } else { |
| 157 | printk(BIOS_DEBUG, |
| 158 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 159 | sbdn + 0x0e); |
| 160 | } |
| 161 | |
| 162 | bus_8131_0 = (pci1234[1] >> 16) & 0xff; |
| 163 | /* 8131-1 */ |
| 164 | dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0)); |
| 165 | if (dev) { |
| 166 | bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 167 | bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 168 | bus_8131_2++; |
| 169 | } else { |
| 170 | printk(BIOS_DEBUG, |
| 171 | "ERROR - could not find PCI %02x:01.0, using defaults\n", |
| 172 | bus_8131_0); |
| 173 | |
| 174 | bus_8131_1 = bus_8131_0 + 1; |
| 175 | bus_8131_2 = bus_8131_0 + 2; |
| 176 | } |
| 177 | /* 8131-2 */ |
| 178 | dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0)); |
| 179 | if (dev) { |
| 180 | bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 181 | } else { |
| 182 | printk(BIOS_DEBUG, |
| 183 | "ERROR - could not find PCI %02x:02.0, using defaults\n", |
| 184 | bus_8131_0); |
| 185 | |
| 186 | bus_8131_2 = bus_8131_1 + 1; |
| 187 | } |
| 188 | |
| 189 | /* CK804b */ |
| 190 | |
| 191 | if (pci1234[2] & 0xf) { //if the second cpu is installed |
| 192 | bus_ck804b_0 = (pci1234[2] >> 16) & 0xff; |
| 193 | #if 0 |
| 194 | dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x09, 0)); |
| 195 | if (dev) { |
| 196 | bus_ck804b_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 197 | bus_ck804b_2 = |
| 198 | pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 199 | bus_ck804b_2++; |
| 200 | } else { |
| 201 | printk(BIOS_DEBUG, |
| 202 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 203 | bus_ck804b_0, sbdnb + 0x09); |
| 204 | |
| 205 | bus_ck804b_1 = bus_ck804b_0 + 1; |
| 206 | bus_ck804b_2 = bus_ck804b_0 + 2; |
| 207 | } |
| 208 | |
| 209 | dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0b, 0)); |
| 210 | if (dev) { |
| 211 | bus_ck804b_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 212 | bus_ck804b_3 = |
| 213 | pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 214 | bus_ck804b_3++; |
| 215 | } else { |
| 216 | printk(BIOS_DEBUG, |
| 217 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 218 | bus_ck804b_0, sbdnb + 0x0b); |
| 219 | |
| 220 | bus_ck804b_2 = bus_ck804b_0 + 1; |
| 221 | bus_ck804b_3 = bus_ck804b_0 + 2; |
| 222 | } |
| 223 | |
| 224 | dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0c, 0)); |
| 225 | if (dev) { |
| 226 | bus_ck804b_3 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 227 | bus_ck804b_4 = |
| 228 | pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 229 | bus_ck804b_4++; |
| 230 | } else { |
| 231 | printk(BIOS_DEBUG, |
| 232 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 233 | bus_ck804b_0, sbdnb + 0x0c); |
| 234 | |
| 235 | bus_ck804b_4 = bus_ck804b_3 + 1; |
| 236 | } |
| 237 | dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0d, 0)); |
| 238 | if (dev) { |
| 239 | bus_ck804b_4 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 240 | bus_ck804b_5 = |
| 241 | pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 242 | bus_ck804b_5++; |
| 243 | } else { |
| 244 | printk(BIOS_DEBUG, |
| 245 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 246 | bus_ck804b_0, sbdnb + 0x0d); |
| 247 | |
| 248 | bus_ck804b_5 = bus_ck804b_4 + 1; |
| 249 | } |
| 250 | #endif |
| 251 | |
| 252 | dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e, 0)); |
| 253 | if (dev) { |
| 254 | bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 255 | } else { |
| 256 | printk(BIOS_DEBUG, |
| 257 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 258 | bus_ck804b_0, sbdnb + 0x0e); |
| 259 | #if 1 |
| 260 | bus_ck804b_5 = bus_ck804b_4 + 1; |
| 261 | #endif |
| 262 | |
| 263 | } |
| 264 | } |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 265 | |
| 266 | /*I/O APICs: APIC ID Version State Address*/ |
Timothy Pearson | d4bbfe8 | 2015-10-27 16:48:36 -0500 | [diff] [blame] | 267 | if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) |
| 268 | apicid_base = get_apicid_base(4); |
| 269 | else |
| 270 | apicid_base = CONFIG_MAX_PHYSICAL_CPUS; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 271 | apicid_ck804 = apicid_base + 0; |
| 272 | apicid_8131_1 = apicid_base + 1; |
| 273 | apicid_8131_2 = apicid_base + 2; |
| 274 | apicid_ck804b = apicid_base + 3; |
Ronald G. Minnich | 90e68ae | 2006-08-07 20:02:02 +0000 | [diff] [blame] | 275 | |
| 276 | } |