Uwe Hermann | 0675d5c | 2010-11-14 20:10:11 +0000 | [diff] [blame] | 1 | chip northbridge/amd/amdk8/root_complex # Root complex |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 2 | device cpu_cluster 0 on # (L)APIC cluster |
Uwe Hermann | 0675d5c | 2010-11-14 20:10:11 +0000 | [diff] [blame] | 3 | chip cpu/amd/socket_940 # CPU socket |
| 4 | device lapic 0 on end # Local APIC of the CPU |
| 5 | end |
| 6 | end |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 7 | device domain 0 on # PCI domain |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 8 | subsystemid 0x108e 0x0040 inherit |
Uwe Hermann | 0675d5c | 2010-11-14 20:10:11 +0000 | [diff] [blame] | 9 | chip northbridge/amd/amdk8 # Northbridge / RAM controller |
| 10 | device pci 18.0 on end |
| 11 | device pci 18.0 on # Link 0 == LDT 0 |
| 12 | chip southbridge/nvidia/ck804 # Southbridge |
| 13 | device pci 0.0 on end # HT |
| 14 | device pci 1.0 on # LPC |
| 15 | chip superio/smsc/lpc47m10x # Super I/O |
| 16 | device pnp 2e.0 off # Floppy |
| 17 | io 0x60 = 0x3f0 |
| 18 | irq 0x70 = 6 |
| 19 | drq 0x74 = 2 |
| 20 | end |
| 21 | device pnp 2e.3 off # Parallel port |
| 22 | io 0x60 = 0x378 |
| 23 | irq 0x70 = 7 |
| 24 | end |
| 25 | device pnp 2e.4 on # Com1 |
| 26 | io 0x60 = 0x3f8 |
| 27 | irq 0x70 = 4 |
| 28 | end |
| 29 | device pnp 2e.5 off # Com2 |
| 30 | io 0x60 = 0x2f8 |
| 31 | irq 0x70 = 3 |
| 32 | end |
| 33 | device pnp 2e.7 off # PS/2 keyboard |
| 34 | io 0x60 = 0x60 |
| 35 | io 0x62 = 0x64 |
| 36 | irq 0x70 = 1 |
| 37 | irq 0x72 = 12 |
| 38 | end |
| 39 | end |
| 40 | end |
| 41 | device pci 1.1 on # SM 0 |
| 42 | chip drivers/generic/generic # DIMM 0-0-0 |
| 43 | device i2c 50 on end |
| 44 | end |
| 45 | chip drivers/generic/generic # DIMM 0-0-1 |
| 46 | device i2c 51 on end |
| 47 | end |
| 48 | chip drivers/generic/generic # DIMM 0-1-0 |
| 49 | device i2c 52 on end |
| 50 | end |
| 51 | chip drivers/generic/generic # DIMM 0-1-1 |
| 52 | device i2c 53 on end |
| 53 | end |
| 54 | chip drivers/generic/generic # DIMM 1-0-0 |
| 55 | device i2c 54 on end |
| 56 | end |
| 57 | chip drivers/generic/generic # DIMM 1-0-1 |
| 58 | device i2c 55 on end |
| 59 | end |
| 60 | chip drivers/generic/generic # DIMM 1-1-0 |
| 61 | device i2c 56 on end |
| 62 | end |
| 63 | chip drivers/generic/generic # DIMM 1-1-1 |
| 64 | device i2c 57 on end |
| 65 | end |
| 66 | end |
| 67 | device pci 1.1 on # SM 1 |
| 68 | # PCI device SMBus address will |
| 69 | # depend on addon PCI device, do |
| 70 | # we need to scan_smbus_bus? |
| 71 | # chip drivers/generic/generic # PCIXA slot 1 |
| 72 | # device i2c 50 on end |
| 73 | # end |
| 74 | # chip drivers/generic/generic # PCIXB slot 1 |
| 75 | # device i2c 51 on end |
| 76 | # end |
| 77 | # chip drivers/generic/generic # PCIXB slot 2 |
| 78 | # device i2c 52 on end |
| 79 | # end |
| 80 | # chip drivers/generic/generic # PCI slot 1 |
| 81 | # device i2c 53 on end |
| 82 | # end |
| 83 | # chip drivers/generic/generic # Master CK804 PCI-E |
| 84 | # device i2c 54 on end |
| 85 | # end |
| 86 | # chip drivers/generic/generic # Slave CK804 PCI-E |
| 87 | # device i2c 55 on end |
| 88 | # end |
| 89 | chip drivers/generic/generic # MAC EEPROM |
| 90 | device i2c 51 on end |
| 91 | end |
| 92 | end |
| 93 | device pci 2.0 on end # USB 1.1 |
| 94 | device pci 2.1 on end # USB 2 |
| 95 | device pci 4.0 on end # ACI |
| 96 | device pci 4.1 off end # MCI |
| 97 | device pci 6.0 on end # IDE |
| 98 | device pci 7.0 on end # SATA 1 |
| 99 | device pci 8.0 on end # SATA 0 |
| 100 | device pci 9.0 on end # PCI |
| 101 | device pci a.0 on end # NIC |
| 102 | device pci b.0 off end # PCI E 3 |
| 103 | device pci c.0 off end # PCI E 2 |
| 104 | device pci d.0 off end # PCI E 1 |
| 105 | device pci e.0 on end # PCI E 0 |
| 106 | register "ide0_enable" = "1" |
| 107 | register "ide1_enable" = "1" |
| 108 | register "sata0_enable" = "1" |
| 109 | register "sata1_enable" = "1" |
| 110 | # 1: SMBus under 2e.8, 2: SM0 3: SM1 |
| 111 | register "mac_eeprom_smbus" = "3" |
| 112 | register "mac_eeprom_addr" = "0x51" |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 113 | end |
Uwe Hermann | 0675d5c | 2010-11-14 20:10:11 +0000 | [diff] [blame] | 114 | end |
| 115 | device pci 18.0 on end # Link 2 |
| 116 | device pci 18.1 on end |
| 117 | device pci 18.2 on end |
| 118 | device pci 18.3 on end |
| 119 | end |
| 120 | chip northbridge/amd/amdk8 # Northbridge / RAM controller |
| 121 | device pci 19.0 on end # Link 0 |
| 122 | device pci 19.0 on # Link 1 == LDT 1 |
| 123 | chip southbridge/nvidia/ck804 # Southbridge |
| 124 | device pci 0.0 on end # HT |
| 125 | device pci 1.0 on end # LPC |
| 126 | device pci 1.1 off end # SM |
| 127 | device pci 2.0 off end # USB 1.1 |
| 128 | device pci 2.1 off end # USB 2 |
| 129 | device pci 4.0 off end # ACI |
| 130 | device pci 4.1 off end # MCI |
| 131 | device pci 6.0 off end # IDE |
| 132 | device pci 7.0 off end # SATA 1 |
| 133 | device pci 8.0 off end # SATA 0 |
| 134 | device pci 9.0 off end # PCI |
| 135 | device pci a.0 on end # NIC |
| 136 | device pci b.0 off end # PCI E 3 |
| 137 | device pci c.0 off end # PCI E 2 |
| 138 | device pci d.0 off end # PCI E 1 |
| 139 | device pci e.0 on end # PCI E 0 |
| 140 | # 1: SMBus under 2e.8, 2: SM0 3: SM1 |
| 141 | register "mac_eeprom_smbus" = "3" |
| 142 | register "mac_eeprom_addr" = "0x51" |
| 143 | end |
| 144 | end |
| 145 | device pci 19.0 on end |
| 146 | device pci 19.1 on end |
| 147 | device pci 19.2 on end |
| 148 | device pci 19.3 on end |
| 149 | end |
| 150 | end |
| 151 | end |