Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Joseph Smith | 6f0074e | 2010-01-30 14:56:15 +0000 | [diff] [blame] | 4 | * Copyright (C) 2008-2010 Joseph Smith <joe@settoplinux.org> |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 17 | #include <stdint.h> |
| 18 | #include <stdlib.h> |
| 19 | #include <device/pci_def.h> |
| 20 | #include <arch/io.h> |
| 21 | #include <device/pnp_def.h> |
Stefan Reinauer | ae5e11d | 2012-04-27 02:31:28 +0200 | [diff] [blame] | 22 | #include "drivers/pc80/udelay_io.c" |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 23 | #include <console/console.h> |
Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 24 | #include <lib.h> |
Edward O'Callaghan | fdceb48 | 2014-06-02 07:58:14 +1000 | [diff] [blame] | 25 | #include <superio/smsc/smscsuperio/smscsuperio.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 26 | #include <northbridge/intel/i82830/raminit.h> |
Joseph Smith | da69582 | 2008-05-15 13:44:33 +0000 | [diff] [blame] | 27 | #include "northbridge/intel/i82830/memory_initialized.c" |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 28 | #include <southbridge/intel/i82801dx/i82801dx.h> |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 29 | #include "southbridge/intel/i82801dx/reset.c" |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 30 | #include <cpu/x86/bist.h> |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 31 | #include "spd_table.h" |
| 32 | #include "gpio.c" |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 33 | #include "southbridge/intel/i82801dx/tco_timer.c" |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 34 | |
Uwe Hermann | 57b2ff8 | 2010-11-21 17:29:59 +0000 | [diff] [blame] | 35 | #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) |
| 36 | |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 37 | /** |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 38 | * The onboard 64MB PC133 memory does not have a SPD EEPROM so the |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 39 | * values have to be set manually, the SO-DIMM socket is located in |
Uwe Hermann | d773fd3 | 2010-11-20 20:23:08 +0000 | [diff] [blame] | 40 | * socket0 (0x50/DIMM0), and the onboard memory is located in socket1 |
| 41 | * (0x51/DIMM1). |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 42 | */ |
| 43 | static inline int spd_read_byte(unsigned device, unsigned address) |
| 44 | { |
| 45 | int i; |
| 46 | |
Uwe Hermann | d773fd3 | 2010-11-20 20:23:08 +0000 | [diff] [blame] | 47 | if (device == DIMM0) { |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 48 | return smbus_read_byte(device, address); |
Uwe Hermann | d773fd3 | 2010-11-20 20:23:08 +0000 | [diff] [blame] | 49 | } else if (device == DIMM1) { |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 50 | for (i = 0; i < ARRAY_SIZE(spd_table); i++) { |
| 51 | if (spd_table[i].address == address) |
| 52 | return spd_table[i].data; |
| 53 | } |
| 54 | return 0xFF; /* Return 0xFF when address is not found. */ |
| 55 | } else { |
| 56 | return 0xFF; /* Return 0xFF on any failures. */ |
| 57 | } |
| 58 | } |
| 59 | |
| 60 | #include "northbridge/intel/i82830/raminit.c" |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 61 | |
| 62 | /** |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 63 | * Setup mainboard specific registers pre raminit. |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 64 | */ |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 65 | static void mb_early_setup(void) |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 66 | { |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 67 | /* - Hub Interface to PCI Bridge Registers - */ |
| 68 | /* 12-Clock Retry Enable */ |
| 69 | pci_write_config16(PCI_DEV(0, 0x1e, 0), 0x50, 0x1402); |
| 70 | /* Master Latency Timer Count */ |
| 71 | pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1b, 0x20); |
| 72 | /* I/O Address Base */ |
| 73 | pci_write_config8(PCI_DEV(0, 0x1e, 0), 0x1c, 0xf0); |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 74 | |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 75 | /* - LPC Interface Bridge Registers - */ |
| 76 | /* Delayed Transaction Enable */ |
| 77 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xd0, 0x00000002); |
| 78 | /* Disable the TCO Timer system reboot feature */ |
| 79 | pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd4, 0x02); |
| 80 | /* CPU Frequency Strap */ |
| 81 | pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd5, 0x02); |
| 82 | /* ACPI base address and enable Resource Indicator */ |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 83 | pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1)); |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 84 | /* Enable the SMBUS */ |
| 85 | enable_smbus(); |
| 86 | /* ACPI base address and disable Resource Indicator */ |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 87 | pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR)); |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 88 | /* ACPI Enable */ |
| 89 | pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10); |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 90 | } |
| 91 | |
Aaron Durbin | a0a3727 | 2014-08-14 08:35:11 -0500 | [diff] [blame] | 92 | #include <cpu/intel/romstage.h> |
Stefan Reinauer | ccdd20a | 2010-04-14 07:47:07 +0000 | [diff] [blame] | 93 | void main(unsigned long bist) |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 94 | { |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 95 | if (bist == 0) { |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 96 | if (memory_initialized()) |
Joseph Smith | da69582 | 2008-05-15 13:44:33 +0000 | [diff] [blame] | 97 | hard_reset(); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 98 | } |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 99 | |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 100 | /* Set southbridge and superio gpios */ |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 101 | mb_gpio_init(); |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 102 | |
| 103 | smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Joseph Smith | 6a1dc86 | 2008-03-09 13:24:46 +0000 | [diff] [blame] | 104 | console_init(); |
| 105 | |
| 106 | /* Halt if there was a built in self test failure. */ |
| 107 | report_bist_failure(bist); |
| 108 | |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 109 | /* disable TCO timers */ |
| 110 | i82801dx_halt_tco_timer(); |
| 111 | |
Joseph Smith | 89e4577 | 2010-01-29 19:15:10 +0000 | [diff] [blame] | 112 | /* Setup mainboard specific registers */ |
| 113 | mb_early_setup(); |
| 114 | |
Joseph Smith | fa742da | 2010-02-01 22:51:18 +0000 | [diff] [blame] | 115 | /* Initialize memory */ |
| 116 | sdram_initialize(); |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 117 | } |