blob: 4cfb90202028ec6f0bb233d54f60525870d2603d [file] [log] [blame]
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +01001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2008 coresystems GmbH
5## Copyright (C) 2013 Vladimir Serbinenko
6##
7## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010016
17# -----------------------------------------------------------------
18entries
19
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010020# -----------------------------------------------------------------
21# Status Register A
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010022# -----------------------------------------------------------------
23# Status Register B
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010024# -----------------------------------------------------------------
25# Status Register C
26#96 4 r 0 status_c_rsvd
27#100 1 r 0 uf_flag
28#101 1 r 0 af_flag
29#102 1 r 0 pf_flag
30#103 1 r 0 irqf_flag
31# -----------------------------------------------------------------
32# Status Register D
33#104 7 r 0 status_d_rsvd
34#111 1 r 0 valid_cmos_ram
35# -----------------------------------------------------------------
36# Diagnostic Status Register
37#112 8 r 0 diag_rsvd1
38
39# -----------------------------------------------------------------
400 120 r 0 reserved_memory
41#120 264 r 0 unused
42
43# -----------------------------------------------------------------
44# RTC_BOOT_BYTE (coreboot hardcoded)
45384 1 e 4 boot_option
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010046388 4 r 0 reboot_bits
47#390 2 r 0 unused?
48
49# -----------------------------------------------------------------
50# coreboot config options: console
51392 3 e 5 baud_rate
52395 4 e 6 debug_level
53#399 1 r 0 unused
54
55# coreboot config options: southbridge
56408 1 e 1 nmi
57409 2 e 7 power_on_after_fail
58411 1 e 9 sata_mode
59
Vladimir Serbinenko55391c42014-08-03 14:51:00 +020060# coreboot config options: northbridge
61424 3 e 10 gfx_uma_size
62
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010063# coreboot config options: check sums
64984 16 h 0 check_sum
65#1000 24 r 0 amd_reserved
66
67# -----------------------------------------------------------------
68
69enumerations
70
71#ID value text
721 0 Disable
731 1 Enable
742 0 Enable
752 1 Disable
764 0 Fallback
774 1 Normal
785 0 115200
795 1 57600
805 2 38400
815 3 19200
825 4 9600
835 5 4800
845 6 2400
855 7 1200
866 1 Emergency
876 2 Alert
886 3 Critical
896 4 Error
906 5 Warning
916 6 Notice
926 7 Info
936 8 Debug
946 9 Spew
957 0 Disable
967 1 Enable
977 2 Keep
988 0 Secondary
998 1 Primary
1009 0 AHCI
1019 1 Compatible
Vladimir Serbinenko55391c42014-08-03 14:51:00 +020010210 0 32M
10310 1 48M
10410 2 64M
10510 3 128M
10610 5 96M
10710 6 160M
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +0100108# -----------------------------------------------------------------
109checksums
110
111checksum 392 415 984