| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| Timothy Pearson | c5ca137 | 2015-02-14 17:51:19 -0600 | [diff] [blame] | 4 | ## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 5 | ## Copyright (C) 2007 AMD |
| 6 | ## Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
| 7 | ## |
| 8 | ## This program is free software; you can redistribute it and/or modify |
| 9 | ## it under the terms of the GNU General Public License as published by |
| 10 | ## the Free Software Foundation; either version 2 of the License, or |
| 11 | ## (at your option) any later version. |
| 12 | ## |
| 13 | ## This program is distributed in the hope that it will be useful, |
| 14 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | ## GNU General Public License for more details. |
| 17 | ## |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 18 | |
| 19 | entries |
| 20 | |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 21 | 0 384 r 0 reserved_memory |
| 22 | 384 1 e 4 boot_option |
| Timothy Pearson | 8e3da74 | 2015-03-14 17:59:51 -0500 | [diff] [blame] | 23 | 388 4 r 0 reboot_bits |
| Timothy Pearson | c5ca137 | 2015-02-14 17:51:19 -0600 | [diff] [blame] | 24 | 393 3 e 5 baud_rate |
| 25 | 396 5 e 10 ecc_scrub_rate |
| 26 | 401 1 e 1 interleave_chip_selects |
| 27 | 402 1 e 1 interleave_nodes |
| 28 | 403 1 e 1 interleave_memory_channels |
| 29 | 404 2 e 8 max_mem_clock |
| 30 | 406 1 e 2 multi_core |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 31 | 412 4 e 6 debug_level |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 32 | 440 4 e 9 slow_cpu |
| 33 | 444 1 e 1 nmi |
| Timothy Pearson | b174667 | 2015-08-11 17:52:03 -0500 | [diff] [blame] | 34 | 445 1 e 1 gart |
| Timothy Pearson | c5ca137 | 2015-02-14 17:51:19 -0600 | [diff] [blame] | 35 | 446 1 e 1 power_on_after_fail |
| Timothy Pearson | c0ae684 | 2015-02-15 16:45:19 -0600 | [diff] [blame] | 36 | 456 1 e 1 ECC_memory |
| 37 | 457 1 e 1 ECC_redirection |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 38 | 728 256 h 0 user_data |
| 39 | 984 16 h 0 check_sum |
| 40 | # Reserve the extended AMD configuration registers |
| Stefan Reinauer | 9050b71 | 2010-03-30 08:01:43 +0000 | [diff] [blame] | 41 | 1000 24 r 0 amd_reserved |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 42 | |
| 43 | |
| 44 | |
| 45 | enumerations |
| 46 | |
| 47 | #ID value text |
| 48 | 1 0 Disable |
| 49 | 1 1 Enable |
| 50 | 2 0 Enable |
| 51 | 2 1 Disable |
| 52 | 4 0 Fallback |
| 53 | 4 1 Normal |
| 54 | 5 0 115200 |
| 55 | 5 1 57600 |
| 56 | 5 2 38400 |
| 57 | 5 3 19200 |
| 58 | 5 4 9600 |
| 59 | 5 5 4800 |
| 60 | 5 6 2400 |
| 61 | 5 7 1200 |
| Timothy Pearson | c5ca137 | 2015-02-14 17:51:19 -0600 | [diff] [blame] | 62 | 6 0 Emergency |
| 63 | 6 1 Alert |
| 64 | 6 2 Critical |
| 65 | 6 3 Error |
| 66 | 6 4 Warning |
| 67 | 6 5 Notice |
| 68 | 6 6 Information |
| 69 | 6 7 Debug |
| 70 | 6 8 Spew |
| Timothy Pearson | c5ca137 | 2015-02-14 17:51:19 -0600 | [diff] [blame] | 71 | 8 0 DDR2-800 |
| 72 | 8 1 DDR2-667 |
| 73 | 8 2 DDR2-533 |
| 74 | 8 3 DDR2-400 |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 75 | 9 0 off |
| 76 | 9 1 87.5% |
| 77 | 9 2 75.0% |
| 78 | 9 3 62.5% |
| 79 | 9 4 50.0% |
| 80 | 9 5 37.5% |
| 81 | 9 6 25.0% |
| 82 | 9 7 12.5% |
| Timothy Pearson | c5ca137 | 2015-02-14 17:51:19 -0600 | [diff] [blame] | 83 | 10 0 Disabled |
| 84 | 10 1 40ns |
| 85 | 10 2 80ns |
| 86 | 10 3 160ns |
| 87 | 10 4 320ns |
| 88 | 10 5 640ns |
| 89 | 10 6 1.28us |
| 90 | 10 7 2.56us |
| 91 | 10 8 5.12us |
| 92 | 10 9 10.2us |
| 93 | 10 10 20.5us |
| 94 | 10 11 41us |
| 95 | 10 12 81.9us |
| 96 | 10 13 163.8us |
| 97 | 10 14 327.7us |
| 98 | 10 15 655.4us |
| 99 | 10 16 1.31ms |
| 100 | 10 17 2.62ms |
| 101 | 10 18 5.24ms |
| 102 | 10 19 10.49ms |
| 103 | 10 20 20.97sms |
| 104 | 10 21 42ms |
| 105 | 10 22 84ms |
| Timothy Pearson | d3b2bbe | 2010-03-01 10:56:51 +0000 | [diff] [blame] | 106 | |
| 107 | checksums |
| 108 | |
| 109 | checksum 392 983 984 |