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bxshifaea4c52006-11-02 16:02:33 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
bxshifaea4c52006-11-02 16:02:33 +00003 *
4 * Copyright (C) 2006 AMD
5 * Written by Yinghai Lu <yinghailu@gmail.com> for AMD.
6 *
7 * Copyright (C) 2006 MSI
8 * Written by bxshi <bingxunshi@gmail.com> for MSI.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
bxshifaea4c52006-11-02 16:02:33 +000019 */
20
bxshifaea4c52006-11-02 16:02:33 +000021#include <console/console.h>
22#include <device/pci.h>
23#include <string.h>
24#include <stdint.h>
25#include <arch/pirq_routing.h>
26#include <cpu/amd/amdk8_sysconf.h>
27
28#include "mb_sysconf.h"
29
30
31static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
32 uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
33 uint8_t slot, uint8_t rfu)
34{
35 pirq_info->bus = bus;
36 pirq_info->devfn = devfn;
37
38 pirq_info->irq[0].link = link0;
39 pirq_info->irq[0].bitmap = bitmap0;
40 pirq_info->irq[1].link = link1;
41 pirq_info->irq[1].bitmap = bitmap1;
42 pirq_info->irq[2].link = link2;
43 pirq_info->irq[2].bitmap = bitmap2;
44 pirq_info->irq[3].link = link3;
45 pirq_info->irq[3].bitmap = bitmap3;
46
47 pirq_info->slot = slot;
48 pirq_info->rfu = rfu;
49}
50
Stefan Reinauere9de1e22010-04-07 15:30:11 +000051
bxshifaea4c52006-11-02 16:02:33 +000052
53unsigned long write_pirq_routing_table(unsigned long addr)
54{
55
56 struct irq_routing_table *pirq;
57 struct irq_info *pirq_info;
58 unsigned slot_num;
59 uint8_t *v;
60
61 uint8_t sum=0;
62 int i;
63
64 struct mb_sysconf_t *m;
65
66 get_bus_conf();
67
68 m = sysconf.mb;
69
70 /* Align the table to be 16 byte aligned. */
71 addr += 15;
72 addr &= ~15;
73
Kyösti Mälkki9533d832014-06-26 05:30:54 +030074 /* This table must be between 0xf0000 & 0x100000 */
Myles Watson08e0fb82010-03-22 16:33:25 +000075 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
bxshifaea4c52006-11-02 16:02:33 +000076
77 pirq = (void *)(addr);
78 v = (uint8_t *)(addr);
79
80 pirq->signature = PIRQ_SIGNATURE;
81 pirq->version = PIRQ_VERSION;
82
83 pirq->rtr_bus = m->bus_bcm5785_0;
84 pirq->rtr_devfn = (sysconf.sbdn<<3)|0;
85
86 pirq->exclusive_irqs = 0;
87
88 pirq->rtr_vendor = 0x1166;
89 pirq->rtr_device = 0x0036;
90
91 pirq->miniport_data = 0;
92
93 memset(pirq->rfu, 0, sizeof(pirq->rfu));
94
95 pirq_info = (void *) ( &pirq->checksum + 1);
96 slot_num = 0;
97//pci bridge
98 write_pirq_info(pirq_info, m->bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
99 pirq_info++; slot_num++;
100
101 pirq->size = 32 + 16 * slot_num;
102
103 for (i = 0; i < pirq->size; i++)
104 sum += v[i];
105
106 sum = pirq->checksum - sum;
107
108 if (sum != pirq->checksum) {
109 pirq->checksum = sum;
110 }
111
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +0000112 printk(BIOS_INFO, "done.\n");
bxshifaea4c52006-11-02 16:02:33 +0000113
114 return (unsigned long) pirq_info;
115
116}