Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 14 | */ |
| 15 | |
Kyösti Mälkki | 526c2fb | 2014-07-10 22:16:58 +0300 | [diff] [blame] | 16 | #include "AGESA.h" |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 17 | #include "amdlib.h" |
Kyösti Mälkki | 26f297e | 2014-05-26 11:27:54 +0300 | [diff] [blame] | 18 | #include <northbridge/amd/agesa/BiosCallOuts.h> |
Kyösti Mälkki | 50c9637 | 2014-10-18 07:51:03 +0300 | [diff] [blame] | 19 | #include "SB800.h" |
| 20 | #include <southbridge/amd/cimx/sb800/gpio_oem.h> |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 21 | #include "heapManager.h" |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 22 | #include <stdlib.h> |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 23 | |
Kyösti Mälkki | f1bb19a | 2014-05-04 17:23:49 +0300 | [diff] [blame] | 24 | /* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess? |
| 25 | * |
| 26 | * COM Express doesn't provide dedicated resets for individual lanes |
| 27 | * and it's not needed for the on-board Intel I210 GbE controller. |
| 28 | */ |
| 29 | |
Stefan Reinauer | dd132a5 | 2015-07-30 11:16:37 -0700 | [diff] [blame] | 30 | static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); |
Kyösti Mälkki | c009601 | 2014-05-05 18:56:33 +0300 | [diff] [blame] | 31 | |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 32 | const BIOS_CALLOUT_STRUCT BiosCallouts[] = |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 33 | { |
Kyösti Mälkki | 5e19fa4 | 2014-05-04 23:13:54 +0300 | [diff] [blame] | 34 | {AGESA_DO_RESET, agesa_Reset }, |
Kyösti Mälkki | a1ebbc4 | 2014-10-17 22:33:22 +0300 | [diff] [blame] | 35 | {AGESA_READ_SPD, agesa_ReadSpd }, |
Kyösti Mälkki | c459f96 | 2014-05-04 17:07:45 +0300 | [diff] [blame] | 36 | {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, |
Kyösti Mälkki | 6b4b151 | 2014-05-05 12:05:53 +0300 | [diff] [blame] | 37 | {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, |
Kyösti Mälkki | f1bb19a | 2014-05-04 17:23:49 +0300 | [diff] [blame] | 38 | {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported }, |
Kyösti Mälkki | c009601 | 2014-05-05 18:56:33 +0300 | [diff] [blame] | 39 | {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit}, |
Kyösti Mälkki | c459f96 | 2014-05-04 17:07:45 +0300 | [diff] [blame] | 40 | {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess }, |
| 41 | {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, |
| 42 | {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 43 | }; |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 44 | const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 45 | |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 46 | /* Call the host environment interface to provide a user hook opportunity. */ |
Stefan Reinauer | dd132a5 | 2015-07-30 11:16:37 -0700 | [diff] [blame] | 47 | static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 48 | { |
Jens Rottmann | 68c9f2b | 2013-03-01 17:20:42 +0100 | [diff] [blame] | 49 | MEM_DATA_STRUCT *MemData = ConfigPtr; |
| 50 | |
| 51 | printk(BIOS_INFO, "Setting DDR3 voltage: "); |
| 52 | FCH_IOMUX(65) = 1; // GPIO65: VMEM_LV_EN# lowers VMEM from 1.5 to 1.35V |
| 53 | switch (MemData->ParameterListPtr->DDR3Voltage) { |
| 54 | case VOLT1_25: // board is not able to provide this |
| 55 | MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry |
| 56 | printk(BIOS_INFO, "can't provide 1.25 V, using "); |
| 57 | // fall through |
| 58 | default: // AGESA.h says in mixed case 1.5V DIMMs get excluded |
| 59 | case VOLT1_35: |
| 60 | FCH_GPIO(65) = 0x08; // = output, disable PU, set to 0 |
| 61 | printk(BIOS_INFO, "1.35 V\n"); |
| 62 | break; |
| 63 | case VOLT1_5: |
| 64 | FCH_GPIO(65) = 0xC8; // = output, disable PU, set to 1 |
| 65 | printk(BIOS_INFO, "1.5 V\n"); |
| 66 | } |
| 67 | |
Jens Rottmann | 1664404 | 2013-03-01 17:12:56 +0100 | [diff] [blame] | 68 | return AGESA_SUCCESS; |
| 69 | } |