Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2010 LiPPERT Embedded Computers GmbH |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | /* Based on romstage.c from the SpaceRunner-LX mainboard. */ |
| 19 | |
| 20 | #include <stdlib.h> |
| 21 | #include <stdint.h> |
| 22 | #include <device/pci_def.h> |
| 23 | #include <arch/io.h> |
| 24 | #include <device/pnp_def.h> |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 25 | #include <console/console.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 26 | #include <cpu/x86/bist.h> |
| 27 | #include <cpu/x86/msr.h> |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 28 | #include <cpu/amd/lxdef.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 29 | #include <southbridge/amd/cs5536/cs5536.h> |
Patrick Georgi | 9bd9a90 | 2010-11-20 10:31:00 +0000 | [diff] [blame] | 30 | #include <spd.h> |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 31 | #include "southbridge/amd/cs5536/early_smbus.c" |
| 32 | #include "southbridge/amd/cs5536/early_setup.c" |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 33 | #include <superio/ite/common/ite.h> |
| 34 | #include <superio/ite/it8712f/it8712f.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 35 | #include <northbridge/amd/lx/raminit.h> |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 36 | |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 37 | #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) |
| 38 | #define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO) |
| 39 | |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 40 | /* Bit0 enables Spread Spectrum. */ |
| 41 | #define SMC_CONFIG 0x01 |
| 42 | |
Christian Gmeiner | c4e07bb | 2013-06-04 17:34:35 +0200 | [diff] [blame] | 43 | int spd_read_byte(unsigned int device, unsigned int address) |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 44 | { |
| 45 | if (device != DIMM0) |
| 46 | return 0xFF; /* No DIMM1, don't even try. */ |
| 47 | |
| 48 | return smbus_read_byte(device, address); |
| 49 | } |
| 50 | |
| 51 | #if !CONFIG_BOARD_OLD_REVISION |
| 52 | /* Send config data to System Management Controller via SMB. */ |
| 53 | static int smc_send_config(unsigned char config_data) |
| 54 | { |
| 55 | if (smbus_check_stop_condition(SMBUS_IO_BASE)) |
| 56 | return 1; |
| 57 | if (smbus_start_condition(SMBUS_IO_BASE)) |
| 58 | return 2; |
| 59 | if (smbus_send_slave_address(SMBUS_IO_BASE, 0x50)) // SMC address |
| 60 | return 3; |
| 61 | if (smbus_send_command(SMBUS_IO_BASE, 0x28)) // set config data |
| 62 | return 4; |
| 63 | if (smbus_send_command(SMBUS_IO_BASE, 0x01)) // data length |
| 64 | return 5; |
| 65 | if (smbus_send_command(SMBUS_IO_BASE, config_data)) |
| 66 | return 6; |
| 67 | smbus_stop_condition(SMBUS_IO_BASE); |
| 68 | return 0; |
| 69 | } |
| 70 | #endif |
| 71 | |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 72 | #include "northbridge/amd/lx/pll_reset.c" |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 73 | #include "lib/generic_sdram.c" |
Kyösti Mälkki | 7916f4c | 2012-02-09 16:07:41 +0200 | [diff] [blame] | 74 | #include "cpu/amd/geode_lx/cpureginit.c" |
| 75 | #include "cpu/amd/geode_lx/syspreinit.c" |
| 76 | #include "cpu/amd/geode_lx/msrinit.c" |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 77 | |
| 78 | static const u16 sio_init_table[] = { // hi=data, lo=index |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 79 | 0x042C, // disable ATXPG; VIN6 enabled, FAN4/5 disabled, VIN7,VIN3 enabled |
| 80 | 0x1423, // don't delay PoWeROK1/2 |
| 81 | 0x9072, // watchdog triggers PWROK, counts seconds |
| 82 | #if !CONFIG_USE_WATCHDOG_ON_BOOT |
| 83 | 0x0073, 0x0074, // disarm watchdog by changing 56 s timeout to 0 |
| 84 | #endif |
| 85 | 0xBF25, 0x172A, 0xF326, // select GPIO function for most pins |
| 86 | 0xBF27, 0xFF28, 0x2D29, // (GP36=FAN_CTL3 (PWM), GP23,22,16,15=SPI, GP13=PWROK1) |
| 87 | 0x66B8, 0x0CB9, // enable pullups on SPI, RS485_EN |
| 88 | 0x07C0, // enable Simple-I/O for GP12-10= RS485_EN2,1, WD_ACTIVE |
| 89 | 0x06C8, // config GP12,11 as output, GP10 as input |
| 90 | 0x2DF5, // map Hw Monitor Thermal Output to GP55 |
| 91 | #if CONFIG_BOARD_OLD_REVISION |
| 92 | 0x1F2A, 0xC072, // switch GP13 to GPIO, WDT output from PWROK to KRST |
| 93 | #endif |
| 94 | }; |
| 95 | |
| 96 | /* Early mainboard specific GPIO setup. */ |
| 97 | static void mb_gpio_init(void) |
| 98 | { |
| 99 | int i; |
| 100 | |
| 101 | /* Init Super I/O WDT, GPIOs. Done early, WDT init may trigger reset! */ |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 102 | for (i = 0; i < ARRAY_SIZE(sio_init_table); i++) { |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 103 | u16 reg = sio_init_table[i]; |
| 104 | ite_reg_write(GPIO_DEV, (u8) reg, (reg >> 8)); |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 105 | } |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 106 | } |
| 107 | |
Aaron Durbin | a0a3727 | 2014-08-14 08:35:11 -0500 | [diff] [blame] | 108 | #include <cpu/intel/romstage.h> |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 109 | void main(unsigned long bist) |
| 110 | { |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 111 | |
| 112 | static const struct mem_controller memctrl[] = { |
Uwe Hermann | 6dc92f0 | 2010-11-21 11:36:03 +0000 | [diff] [blame] | 113 | {.channel0 = {DIMM0, DIMM1}} |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 114 | }; |
| 115 | |
| 116 | SystemPreInit(); |
| 117 | msr_init(); |
| 118 | |
| 119 | cs5536_early_setup(); |
| 120 | |
| 121 | /* |
| 122 | * Note: Must do this AFTER the early_setup! It is counting on some |
| 123 | * early MSR setup for CS5536. |
| 124 | */ |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 125 | ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 126 | mb_gpio_init(); |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 127 | console_init(); |
| 128 | |
| 129 | /* Halt if there was a built in self test failure */ |
| 130 | report_bist_failure(bist); |
| 131 | |
Patrick Georgi | 7dc2864 | 2012-07-13 19:06:22 +0200 | [diff] [blame] | 132 | pll_reset(); |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 133 | |
| 134 | cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); |
| 135 | |
Peter Stuge | 51eafde | 2010-10-13 06:23:02 +0000 | [diff] [blame] | 136 | #if !CONFIG_BOARD_OLD_REVISION |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 137 | int err; |
| 138 | /* bit0 = Spread Spectrum */ |
| 139 | if ((err = smc_send_config(SMC_CONFIG))) { |
Stefan Reinauer | 069f476 | 2015-01-05 13:02:32 -0800 | [diff] [blame] | 140 | printk(BIOS_ERR, "ERROR %d sending config data to SMC\n", err); |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 141 | } |
| 142 | #endif |
| 143 | |
| 144 | sdram_initialize(1, memctrl); |
| 145 | |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 146 | /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ |
Jens Rottmann | 36224b4 | 2010-09-10 21:51:34 +0000 | [diff] [blame] | 147 | } |