blob: cb76e7064b85f983925d00ace0bd6e04f6590371 [file] [log] [blame]
Nicolas Reinecke572795b2014-12-29 19:57:29 +01001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2008 coresystems GmbH
5## Copyright (C) 2014 Vladimir Serbinenko
6##
7## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Nicolas Reinecke572795b2014-12-29 19:57:29 +010016
17# -----------------------------------------------------------------
18entries
19
Nicolas Reinecke572795b2014-12-29 19:57:29 +010020# -----------------------------------------------------------------
21# Status Register A
Nicolas Reinecke572795b2014-12-29 19:57:29 +010022# -----------------------------------------------------------------
23# Status Register B
Nicolas Reinecke572795b2014-12-29 19:57:29 +010024# -----------------------------------------------------------------
25# Status Register C
26#96 4 r 0 status_c_rsvd
27#100 1 r 0 uf_flag
28#101 1 r 0 af_flag
29#102 1 r 0 pf_flag
30#103 1 r 0 irqf_flag
31# -----------------------------------------------------------------
32# Status Register D
33#104 7 r 0 status_d_rsvd
34#111 1 r 0 valid_cmos_ram
35# -----------------------------------------------------------------
36# Diagnostic Status Register
37#112 8 r 0 diag_rsvd1
38
39# -----------------------------------------------------------------
400 120 r 0 reserved_memory
41#120 264 r 0 unused
42
43# -----------------------------------------------------------------
44# RTC_BOOT_BYTE (coreboot hardcoded)
45384 1 e 4 boot_option
Nicolas Reinecke572795b2014-12-29 19:57:29 +010046388 4 r 0 reboot_bits
47#390 2 r 0 unused?
48
49# -----------------------------------------------------------------
50# coreboot config options: console
51392 3 e 5 baud_rate
52395 4 e 6 debug_level
53#399 1 r 0 unused
54
55400 8 h 0 volume
56
57# coreboot config options: southbridge
58408 1 e 1 nmi
59409 2 e 7 power_on_after_fail
60
61# coreboot config options: EC
62411 1 e 8 first_battery
63412 1 e 1 bluetooth
64413 1 e 1 wwan
65414 1 e 1 touchpad
66415 1 e 1 wlan
67416 1 e 1 trackpoint
68417 1 e 1 fn_ctrl_swap
69418 1 e 1 sticky_fn
70419 1 e 1 power_management_beeps
71421 1 e 9 sata_mode
72#422 2 r 1 unused
73
74# coreboot config options: cpu
75424 1 e 2 hyper_threading
76#425 7 r 0 unused
77
78# coreboot config options: northbridge
79432 3 e 11 gfx_uma_size
80#435 549 r 0 unused
81
82# SandyBridge MRC Scrambler Seed values
83896 32 r 0 mrc_scrambler_seed
84928 32 r 0 mrc_scrambler_seed_s3
85960 16 r 0 mrc_scrambler_seed_chk
86
87# coreboot config options: check sums
88984 16 h 0 check_sum
89
90# -----------------------------------------------------------------
91
92enumerations
93
94#ID value text
951 0 Disable
961 1 Enable
972 0 Enable
982 1 Disable
994 0 Fallback
1004 1 Normal
1015 0 115200
1025 1 57600
1035 2 38400
1045 3 19200
1055 4 9600
1065 5 4800
1075 6 2400
1085 7 1200
1096 1 Emergency
1106 2 Alert
1116 3 Critical
1126 4 Error
1136 5 Warning
1146 6 Notice
1156 7 Info
1166 8 Debug
1176 9 Spew
1187 0 Disable
1197 1 Enable
1207 2 Keep
1218 0 Secondary
1228 1 Primary
1239 0 AHCI
1249 1 Compatible
12510 0 Both
12610 1 Keyboard only
12710 2 Thinklight only
12810 3 None
12911 0 32M
13011 1 64M
13111 2 96M
13211 3 128M
13311 4 160M
13411 5 192M
13511 6 224M
136
137# -----------------------------------------------------------------
138checksums
139
140checksum 392 415 984