blob: 836ff35c0768783476e5a433a662304956b74aad [file] [log] [blame]
Timothy Pearson4b373c92015-04-05 17:54:08 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
5 * Copyright (C) 2013 Vladimir Serbinenko <phcoder@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
10 * the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Timothy Pearson4b373c92015-04-05 17:54:08 -050016 */
17
18#define __SIMPLE_DEVICE__
19#include <console/console.h>
20#include <arch/io.h>
21#include <device/device.h>
22#include <device/pci.h>
23#include <delay.h>
24#include "dock.h"
25#include "southbridge/intel/i82801ix/i82801ix.h"
26#include "ec/lenovo/h8/h8.h"
27#include <ec/acpi/ec.h>
28
29#define LPC_DEV PCI_DEV(0, 0x1f, 0)
30
31void h8_mainboard_init_dock (void)
32{
33 if (dock_present()) {
34 printk(BIOS_DEBUG, "dock is connected\n");
35 dock_connect();
36 } else
37 printk(BIOS_DEBUG, "dock is not connected\n");
38}
39
40void dock_connect(void)
41{
42 u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc;
43 ec_set_bit(0x02, 0);
44 outl(inl(gpiobase + 0x0c) | (1 << 28), gpiobase + 0x0c);
45}
46
47void dock_disconnect(void)
48{
49 u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc;
50 ec_clr_bit(0x02, 0);
51 outl(inl(gpiobase + 0x0c) & ~(1 << 28), gpiobase + 0x0c);
52}
53
54int dock_present(void)
55{
56 u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc;
57 u8 st = inb(gpiobase + 0x0c);
58
59 return ((st >> 2) & 7) != 7;
60}