Blame - src/mainboard/kontron/ktqm77/cmos.layout - coreboot

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Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	1	##
				2	## This file is part of the coreboot project.
				3	##
				4	## Copyright (C) 2007-2008 coresystems GmbH
				5	##
				6	## This program is free software; you can redistribute it and/or modify
				7	## it under the terms of the GNU General Public License as published by
				8	## the Free Software Foundation; version 2 of the License.
				9	##
				10	## This program is distributed in the hope that it will be useful,
				11	## but WITHOUT ANY WARRANTY; without even the implied warranty of
				12	## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
				13	## GNU General Public License for more details.
				14	##
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	15
				16	# -----------------------------------------------------------------
				17	entries
				18
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	19	# -----------------------------------------------------------------
				20	# Status Register A
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	21	# -----------------------------------------------------------------
				22	# Status Register B
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	23	# -----------------------------------------------------------------
				24	# Status Register C
				25	#96 4 r 0 status_c_rsvd
				26	#100 1 r 0 uf_flag
				27	#101 1 r 0 af_flag
				28	#102 1 r 0 pf_flag
				29	#103 1 r 0 irqf_flag
				30	# -----------------------------------------------------------------
				31	# Status Register D
				32	#104 7 r 0 status_d_rsvd
				33	#111 1 r 0 valid_cmos_ram
				34	# -----------------------------------------------------------------
				35	# Diagnostic Status Register
				36	#112 8 r 0 diag_rsvd1
				37
				38	# -----------------------------------------------------------------
				39	0 120 r 0 reserved_memory
				40	#120 264 r 0 unused
				41
				42	# -----------------------------------------------------------------
				43	# RTC_BOOT_BYTE (coreboot hardcoded)
				44	384 1 e 4 boot_option
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	45	388 4 r 0 reboot_bits
				46	#390 2 r 0 unused?
				47
				48	# -----------------------------------------------------------------
				49	# coreboot config options: console
				50	392 3 e 5 baud_rate
				51	395 4 e 6 debug_level
				52	#399 1 r 0 unused
				53
				54	# coreboot config options: cpu
				55	400 1 e 2 hyper_threading
Vladimir Serbinenko	5fc04d1	2014-08-03 01:59:38 +0200	[diff] [blame]	56	401 3 e 12 gfx_uma_size
				57
				58	#404 4 r 0 unused
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	59
				60	# coreboot config options: southbridge
				61	408 1 e 1 nmi
				62	409 2 e 7 power_on_after_fail
Vladimir Serbinenko	6d6298d	2014-01-11 07:46:50 +0100	[diff] [blame]	63	411 1 e 11 sata_mode
				64	#412 4 r 0 unused
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	65
Nico Huber	8e1a7cc	2013-07-12 14:47:50 +0200	[diff] [blame]	66	# coreboot config options: additional mainboard options
				67	416 4 e 10 systemp_type
				68	420 7 h 0 fan1_min
				69	427 7 h 0 fan1_max
				70	434 7 h 0 fan2_min
				71	441 7 h 0 fan2_max
				72
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	73	# coreboot config options: bootloader
Patrick Georgi	c000352	2013-06-25 11:14:03 +0200	[diff] [blame]	74	448 64 r 0 write_protected_by_bios
				75	512 328 s 0 boot_devices
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	76	840 8 h 0 boot_default
				77	848 1 e 9 cmos_defaults_loaded
Patrick Georgi	f7381f8	2013-08-15 14:57:09 +0200	[diff] [blame]	78	849 1 e 2 ethernet1
				79	850 1 e 2 ethernet2
				80	#851 5 r 0 unused
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	81
				82	# coreboot config options: mainboard specific options
				83	856 2 e 8 fan1_mode
				84	858 2 r 0 fan1_reserved
				85	860 2 e 8 fan2_mode
				86	862 2 r 0 fan2_reserved
				87	864 16 h 0 fan1_target
				88	880 16 h 0 fan2_target
				89
				90	# SandyBridge MRC Scrambler Seed values
				91	896 32 r 0 mrc_scrambler_seed
				92	928 32 r 0 mrc_scrambler_seed_s3
				93	960 16 r 0 mrc_scrambler_seed_chk
				94
				95	# coreboot config options: check sums
				96	984 16 h 0 check_sum
				97	#1000 24 r 0 amd_reserved
				98
				99	# -----------------------------------------------------------------
				100
				101	enumerations
				102
				103	#ID value text
				104	1 0 Disable
				105	1 1 Enable
				106	2 0 Enable
				107	2 1 Disable
				108	4 0 Fallback
				109	4 1 Normal
				110	5 0 115200
				111	5 1 57600
				112	5 2 38400
				113	5 3 19200
				114	5 4 9600
				115	5 5 4800
				116	5 6 2400
				117	5 7 1200
				118	6 1 Emergency
				119	6 2 Alert
				120	6 3 Critical
				121	6 4 Error
				122	6 5 Warning
				123	6 6 Notice
				124	6 7 Info
				125	6 8 Debug
				126	6 9 Spew
				127	7 0 Disable
				128	7 1 Enable
				129	7 2 Keep
				130	8 0 Auto
				131	8 1 PWM
				132	8 2 Speed
				133	8 3 Thermal
				134	9 0 No
				135	9 1 Yes
Nico Huber	8e1a7cc	2013-07-12 14:47:50 +0200	[diff] [blame]	136	10 0 None
				137	10 1 AMD
				138	10 2 LM75@90
				139	10 3 GPIO16
				140	10 4 LM75@9e
Vladimir Serbinenko	6d6298d	2014-01-11 07:46:50 +0100	[diff] [blame]	141	11 0 AHCI
				142	11 1 Compatible
Vladimir Serbinenko	5fc04d1	2014-08-03 01:59:38 +0200	[diff] [blame]	143	12 0 32M
				144	12 1 64M
				145	12 2 96M
				146	12 3 128M
				147	12 4 160M
				148	12 5 192M
				149	12 6 224M
				150
Nico Huber	efe1fed	2013-04-29 18:00:57 +0200	[diff] [blame]	151	# -----------------------------------------------------------------
				152	checksums
				153
Nico Huber	696561c	2013-07-15 12:31:21 +0200	[diff] [blame]	154	checksum 392 895 984