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Edward O'Callaghan4726a872014-01-25 07:40:39 +11001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Edward O'Callaghan4726a872014-01-25 07:40:39 +110014 */
15
16
Edward O'Callaghan5ff4b082014-03-29 17:54:26 +110017#include <arch/pirq_routing.h>
Edward O'Callaghan4726a872014-01-25 07:40:39 +110018#include <console/console.h>
Edward O'Callaghan5ff4b082014-03-29 17:54:26 +110019#include <cpu/amd/amdfam14.h>
Kyösti Mälkki0c797f12014-07-21 19:35:16 +030020#include <device/pci_def.h>
Edward O'Callaghan4726a872014-01-25 07:40:39 +110021#include <string.h>
22#include <stdint.h>
Edward O'Callaghan4726a872014-01-25 07:40:39 +110023
24
25static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
Edward O'Callaghanfeebd862014-04-10 19:12:28 +100026 u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
27 u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
28 u8 slot, u8 rfu)
Edward O'Callaghan4726a872014-01-25 07:40:39 +110029{
30 pirq_info->bus = bus;
31 pirq_info->devfn = devfn;
32 pirq_info->irq[0].link = link0;
33 pirq_info->irq[0].bitmap = bitmap0;
34 pirq_info->irq[1].link = link1;
35 pirq_info->irq[1].bitmap = bitmap1;
36 pirq_info->irq[2].link = link2;
37 pirq_info->irq[2].bitmap = bitmap2;
38 pirq_info->irq[3].link = link3;
39 pirq_info->irq[3].bitmap = bitmap3;
40 pirq_info->slot = slot;
41 pirq_info->rfu = rfu;
42}
Edward O'Callaghan4726a872014-01-25 07:40:39 +110043
44unsigned long write_pirq_routing_table(unsigned long addr)
45{
46
47 struct irq_routing_table *pirq;
48 struct irq_info *pirq_info;
49 u32 slot_num;
50 u8 *v;
51
52 u8 sum = 0;
53 int i;
54
Edward O'Callaghanfeebd862014-04-10 19:12:28 +100055 /* Align table on 16 byte boundary. */
Edward O'Callaghan4726a872014-01-25 07:40:39 +110056 addr += 15;
57 addr &= ~15;
58
Edward O'Callaghanfeebd862014-04-10 19:12:28 +100059 /* This table must be between 0xf0000 & 0x100000 */
Edward O'Callaghan4726a872014-01-25 07:40:39 +110060 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
61
62 pirq = (void *)(addr);
63 v = (u8 *) (addr);
64
65 pirq->signature = PIRQ_SIGNATURE;
66 pirq->version = PIRQ_VERSION;
67
Kyösti Mälkki0c797f12014-07-21 19:35:16 +030068 pirq->rtr_bus = 0;
69 pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
Edward O'Callaghan4726a872014-01-25 07:40:39 +110070
71 pirq->exclusive_irqs = 0;
72
73 pirq->rtr_vendor = 0x1002;
74 pirq->rtr_device = 0x4384;
75
76 pirq->miniport_data = 0;
77
78 memset(pirq->rfu, 0, sizeof(pirq->rfu));
79
80 pirq_info = (void *)(&pirq->checksum + 1);
81 slot_num = 0;
82
Edward O'Callaghanfeebd862014-04-10 19:12:28 +100083 /* PCI Bridge */
Kyösti Mälkki0c797f12014-07-21 19:35:16 +030084 write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
Edward O'Callaghan4726a872014-01-25 07:40:39 +110085 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
86 0);
87 pirq_info++;
88
Edward O'Callaghan4726a872014-01-25 07:40:39 +110089 slot_num++;
90
Edward O'Callaghan4726a872014-01-25 07:40:39 +110091 pirq->size = 32 + 16 * slot_num;
92
93 for (i = 0; i < pirq->size; i++)
94 sum += v[i];
95
96 sum = pirq->checksum - sum;
97
98 if (sum != pirq->checksum) {
99 pirq->checksum = sum;
100 }
101
102 printk(BIOS_INFO, "write_pirq_routing_table done.\n");
103
104 return (unsigned long)pirq_info;
Edward O'Callaghan4726a872014-01-25 07:40:39 +1100105}