Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
Edward O'Callaghan | feebd86 | 2014-04-10 19:12:28 +1000 | [diff] [blame] | 5 | * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>. |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H |
| 18 | #define _PLATFORM_GNB_PCIE_COMPLEX_H |
| 19 | |
Edward O'Callaghan | 5ff4b08 | 2014-03-29 17:54:26 +1100 | [diff] [blame] | 20 | #include <vendorcode/amd/agesa/f14/AGESA.h> |
| 21 | #include <vendorcode/amd/agesa/f14/Lib/amdlib.h> |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 22 | |
Edward O'Callaghan | feebd86 | 2014-04-10 19:12:28 +1000 | [diff] [blame] | 23 | /** |
| 24 | * @brief Graphic NorthBridge (GNB) General Purpose Port (GPP) |
| 25 | * |
| 26 | * GNB_GPP_PORT?_PORT_PRESENT |
| 27 | * 0:Disable 1:Enable |
| 28 | * |
| 29 | * GNB_GPP_PORT?_SPEED_MODE |
| 30 | * 0:Auto 1:GEN1 2:GEN2 |
| 31 | * |
| 32 | * GNB_GPP_PORT?_LINK_ASPM |
| 33 | * 0:Disable 1:L0s 2:L1 3:L0s+L1 |
| 34 | * |
| 35 | * GNB_GPP_PORT?_CHANNEL_TYPE - |
| 36 | * 0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db) |
| 37 | * 3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) |
| 38 | * |
| 39 | * GNB_GPP_PORT?_HOTPLUG_SUPPORT |
| 40 | * 0:Disable 1:Basic 3:Enhanced |
| 41 | */ |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 42 | |
Edward O'Callaghan | feebd86 | 2014-04-10 19:12:28 +1000 | [diff] [blame] | 43 | /* GNB GPP 4 */ |
| 44 | #define GNB_GPP_PORT4_PORT_PRESENT 1 |
| 45 | #define GNB_GPP_PORT4_SPEED_MODE 2 |
| 46 | #define GNB_GPP_PORT4_LINK_ASPM 3 |
| 47 | #define GNB_GPP_PORT4_CHANNEL_TYPE 4 |
| 48 | #define GNB_GPP_PORT4_HOTPLUG_SUPPORT 0 |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 49 | |
Edward O'Callaghan | feebd86 | 2014-04-10 19:12:28 +1000 | [diff] [blame] | 50 | /* GNB GPP 5 */ |
| 51 | #define GNB_GPP_PORT5_PORT_PRESENT 1 |
| 52 | #define GNB_GPP_PORT5_SPEED_MODE 2 |
| 53 | #define GNB_GPP_PORT5_LINK_ASPM 3 |
| 54 | #define GNB_GPP_PORT5_CHANNEL_TYPE 4 |
| 55 | #define GNB_GPP_PORT5_HOTPLUG_SUPPORT 0 |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 56 | |
Edward O'Callaghan | feebd86 | 2014-04-10 19:12:28 +1000 | [diff] [blame] | 57 | /* GNB GPP 6 */ |
| 58 | #define GNB_GPP_PORT6_PORT_PRESENT 1 |
| 59 | #define GNB_GPP_PORT6_SPEED_MODE 2 |
| 60 | #define GNB_GPP_PORT6_LINK_ASPM 3 |
| 61 | #define GNB_GPP_PORT6_CHANNEL_TYPE 4 |
| 62 | #define GNB_GPP_PORT6_HOTPLUG_SUPPORT 0 |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 63 | |
Edward O'Callaghan | feebd86 | 2014-04-10 19:12:28 +1000 | [diff] [blame] | 64 | /* GNB GPP 7 */ |
| 65 | #define GNB_GPP_PORT7_PORT_PRESENT 0 |
| 66 | #define GNB_GPP_PORT7_SPEED_MODE 2 |
| 67 | #define GNB_GPP_PORT7_LINK_ASPM 3 |
| 68 | #define GNB_GPP_PORT7_CHANNEL_TYPE 4 |
| 69 | #define GNB_GPP_PORT7_HOTPLUG_SUPPORT 0 |
| 70 | |
| 71 | /* GNB GPP 8 */ |
| 72 | #define GNB_GPP_PORT8_PORT_PRESENT 1 |
| 73 | #define GNB_GPP_PORT8_SPEED_MODE 2 |
| 74 | #define GNB_GPP_PORT8_LINK_ASPM 3 |
| 75 | #define GNB_GPP_PORT8_CHANNEL_TYPE 4 |
| 76 | #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 |
Edward O'Callaghan | 4726a87 | 2014-01-25 07:40:39 +1100 | [diff] [blame] | 77 | |
Edward O'Callaghan | feebd86 | 2014-04-10 19:12:28 +1000 | [diff] [blame] | 78 | #endif /* _PLATFORM_GNB_PCIE_COMPLEX_H */ |