Marc Jones | 3b0a626 | 2015-09-15 23:05:00 -0600 | [diff] [blame] | 1 | chip northbridge/intel/fsp_sandybridge |
| 2 | |
| 3 | device cpu_cluster 0 on |
| 4 | chip cpu/intel/socket_BGA1284 |
| 5 | device lapic 0 on end |
| 6 | end |
| 7 | chip cpu/intel/fsp_model_206ax |
| 8 | # Magic APIC ID to locate this chip |
| 9 | device lapic 0xACAC off end |
| 10 | |
| 11 | register "c1_battery" = "3" # ACPI(C1) = MWAIT(C3) |
| 12 | register "c2_battery" = "4" # ACPI(C2) = MWAIT(C6) |
| 13 | register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7) |
| 14 | |
| 15 | register "c1_acpower" = "3" # ACPI(C1) = MWAIT(C3) |
| 16 | register "c2_acpower" = "4" # ACPI(C2) = MWAIT(C6) |
| 17 | register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7) |
| 18 | end |
| 19 | end |
| 20 | |
| 21 | device domain 0 on |
| 22 | device pci 00.0 on end # host bridge |
| 23 | device pci 01.0 on end # host bridge (slot 2 - black x16 slot (only x8)) |
| 24 | device pci 01.1 on end # host bridge (PCIe Ethernet controllers) |
| 25 | device pci 01.2 off end # host bridge (off - no additional bifurcation) |
| 26 | device pci 02.0 off end # vga controller |
| 27 | device pci 06.0 on end # host bridge (slot 1 - blue x4 slot) |
| 28 | |
| 29 | chip southbridge/intel/fsp_i89xx # Intel Series 89xx Cave Creek PCH |
| 30 | register "ide_legacy_combined" = "0x0" |
| 31 | register "sata_ahci" = "0x01" |
| 32 | register "sata_port_map" = "0x30" |
| 33 | register "c2_latency" = "1" |
| 34 | register "p_cnt_throttling_supported" = "0" |
| 35 | |
| 36 | device pci 16.0 on end # Management Engine Interface 1 |
| 37 | device pci 16.1 off end # Management Engine Interface 2 |
| 38 | device pci 16.2 off end # Management Engine IDE-R |
| 39 | device pci 16.3 off end # Management Engine KT |
| 40 | device pci 1c.0 on end # PCIe Port #1 (Slot #3 - x1) |
| 41 | device pci 1c.1 on end # PCIe Port #2 (Slot #4 - x1) |
| 42 | device pci 1c.2 on end # PCIe Port #3 (Slot #5 - x1) |
| 43 | device pci 1c.3 on end # PCIe Port #4 (Slot #6 - x1) |
| 44 | device pci 1d.0 on end # USB2 EHCI #1 |
| 45 | device pci 1f.0 on # LPC bridge |
| 46 | |
| 47 | # The top serial port is controlled by jumper |
| 48 | # J3a3. If the jumper is off, the serial |
| 49 | # port connector is routed to the SIO. If |
| 50 | # the jumper is on, the connector goes to |
| 51 | # the PCH's serial port. There is no way |
| 52 | # to tell in software which it's connected |
| 53 | # to. |
| 54 | |
| 55 | chip superio/intel/i8900 |
| 56 | device pnp 4e.4 on # Com3 |
| 57 | io 0x60 = 0x3E8 |
| 58 | irq 0x70 = 4 |
| 59 | end |
| 60 | device pnp 4e.5 on # Com2 |
| 61 | io 0x60 = 0x2f8 |
| 62 | irq 0x70 = 3 |
| 63 | end |
| 64 | device pnp 4e.6 on # Watchdog Timer |
| 65 | io 0x60 = 0x600 |
| 66 | irq 0x70 = 7 |
| 67 | end |
| 68 | end |
| 69 | |
| 70 | chip superio/winbond/wpcd376i |
| 71 | device pnp 2e.0 off end # FDC |
| 72 | device pnp 2e.1 off end # LPT |
| 73 | device pnp 2e.2 off end # IR |
| 74 | device pnp 2e.3 on # Com1 |
| 75 | io 0x60 = 0x3f8 |
| 76 | irq 0x70 = 4 |
| 77 | end |
| 78 | device pnp 2e.4 off end # System wakeup |
| 79 | device pnp 2e.5 on # PS/2 mouse |
| 80 | irq 0x70 = 0x0C |
| 81 | end |
| 82 | device pnp 2e.6 on # PS/2 keyboard |
| 83 | io 0x60 = 0x60 |
| 84 | io 0x62 = 0x64 |
| 85 | irq 0x70 = 0x01 |
| 86 | end |
| 87 | device pnp 2e.7 off end # GPIO |
| 88 | end |
| 89 | end |
| 90 | device pci 1f.2 on end # SATA Controller 1 |
| 91 | device pci 1f.3 on end # SMBus |
| 92 | device pci 1f.5 off end # SATA Controller 2 |
| 93 | device pci 1f.6 on end # Thermal |
| 94 | device pci 1f.7 on end # WDT |
| 95 | end |
| 96 | end |
| 97 | end |