Martin Roth | bf6b83a | 2015-10-11 10:37:02 +0200 | [diff] [blame] | 1 | chip northbridge/intel/fsp_sandybridge |
| 2 | # IGD Displays |
| 3 | register "gfx.ndid" = "3" |
| 4 | register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" |
| 5 | |
| 6 | # Enable DisplayPort 1 Hotplug with 6ms pulse |
| 7 | register "gpu_dp_d_hotplug" = "0x06" |
| 8 | |
| 9 | # Enable DisplayPort 0 Hotplug with 6ms pulse |
| 10 | register "gpu_dp_c_hotplug" = "0x06" |
| 11 | |
| 12 | # Enable DVI Hotplug with 6ms pulse |
| 13 | register "gpu_dp_b_hotplug" = "0x06" |
| 14 | |
| 15 | device cpu_cluster 0 on |
| 16 | chip cpu/intel/socket_rPGA989 |
| 17 | device lapic 0 on end |
| 18 | end |
| 19 | chip cpu/intel/fsp_model_206ax |
| 20 | # Magic APIC ID to locate this chip |
| 21 | device lapic 0xACAC off end |
| 22 | |
| 23 | register "c1_battery" = "3" # ACPI(C1) = MWAIT(C3) |
| 24 | register "c2_battery" = "4" # ACPI(C2) = MWAIT(C6) |
| 25 | register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7) |
| 26 | |
| 27 | register "c1_acpower" = "3" # ACPI(C1) = MWAIT(C3) |
| 28 | register "c2_acpower" = "4" # ACPI(C2) = MWAIT(C6) |
| 29 | register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7) |
| 30 | end |
| 31 | end |
| 32 | |
| 33 | device domain 0 on |
| 34 | device pci 00.0 on end # host bridge |
| 35 | device pci 02.0 on end # vga controller |
| 36 | |
| 37 | chip southbridge/intel/fsp_bd82x6x # Intel Series 6 Cougar Point PCH |
| 38 | register "sata_port_map" = "0x3f" |
| 39 | |
| 40 | register "c2_latency" = "1" |
| 41 | register "p_cnt_throttling_supported" = "0" |
| 42 | |
| 43 | device pci 14.0 on end # XHCI |
| 44 | device pci 16.0 on end # Management Engine Interface 1 |
| 45 | device pci 16.1 on end # Management Engine Interface 2 |
| 46 | device pci 16.2 off end # Management Engine IDE-R |
| 47 | device pci 16.3 off end # Management Engine KT |
| 48 | device pci 19.0 on end # Intel Gigabit Ethernet |
| 49 | device pci 1a.0 on end # USB2 EHCI #2 |
| 50 | device pci 1b.0 off end # High Definition Audio |
| 51 | device pci 1c.0 on end # PCIe Port #1 |
| 52 | device pci 1c.1 on end # PCIe Port #2 |
| 53 | device pci 1c.2 on end # PCIe Port #3 |
| 54 | device pci 1c.3 on end # PCIe Port #4 |
| 55 | device pci 1c.4 on end # PCIe Port #5 |
| 56 | device pci 1c.5 on end # PCIe Port #6 |
| 57 | device pci 1c.6 on end # PCIe Port #7 |
| 58 | device pci 1c.7 on end # PCIe Port #8 |
| 59 | device pci 1d.0 on end # USB2 EHCI #1 |
| 60 | device pci 1e.0 off end # PCI bridge |
| 61 | device pci 1f.0 on # LPC bridge |
| 62 | # TODO: insert SIO UART and WDT |
| 63 | end |
| 64 | device pci 1f.2 on end # SATA Controller 1 |
| 65 | device pci 1f.3 on end # SMBus |
| 66 | device pci 1f.5 on end # SATA Controller 2 |
| 67 | device pci 1f.6 on end # Thermal |
| 68 | end |
| 69 | end |
| 70 | end |