blob: d033ba719591320dd442750854ef77235dd30de8 [file] [log] [blame]
Ricardo Martins892d8d22012-08-06 05:40:07 +01001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2012 Ricardo Martins <rasmartins@gmail.com>
5##
6## This program is free software; you can redistribute it and/or
7## modify it under the terms of the GNU General Public License as
8## published by the Free Software Foundation; version 2 of
9## the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Ricardo Martins892d8d22012-08-06 05:40:07 +010016
17if BOARD_IEI_PM_LX2_800_R10
18
19config BOARD_SPECIFIC_OPTIONS
20 def_bool y
Ricardo Martins892d8d22012-08-06 05:40:07 +010021 select CPU_AMD_GEODE_LX
22 select NORTHBRIDGE_AMD_LX
23 select SOUTHBRIDGE_AMD_CS5536
24 select SUPERIO_SMSC_SMSCSUPERIO
25 select HAVE_PIRQ_TABLE
26 select PIRQ_ROUTE
27 select BOARD_ROMSIZE_KB_512
28 select POWER_BUTTON_FORCE_ENABLE
29 select PLL_MANUAL_CONFIG
30 select CORE_GLIU_500_266
31
32config MAINBOARD_DIR
33 string
34 default iei/pm-lx2-800-r10
35
36config MAINBOARD_PART_NUMBER
37 string
38 default "PM-LX2-800-R10"
39
40config IRQ_SLOT_COUNT
41 int
42 default 3
43
44config PLLMSRlo
45 hex
46 default 0x07de0000
47
48endif # BOARD_IEI_PM_LX2_800_R10