Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2001 Eric W.Biederman<ebiderman@lnxi.com> |
| 5 | * |
| 6 | * Copyright (C) 2006 AMD |
| 7 | * Written by Yinghai Lu <yinghailu@gmail.com> for AMD. |
| 8 | * |
| 9 | * Copyright (C) 2007 University of Mannheim |
| 10 | * Written by Philipp Degler <pdegler@rumms.uni-mannheim.e> for Uni of Mannheim |
| 11 | * |
| 12 | * Copyright (C) 2009 University of Heidelberg |
| 13 | * Written by Mondrian Nuessle <nuessle@uni-hd.de> for Uni of Heidelberg |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 24 | */ |
| 25 | |
| 26 | #include <console/console.h> |
| 27 | #include <arch/smp/mpspec.h> |
| 28 | #include <arch/io.h> |
| 29 | #include <device/pci.h> |
| 30 | #include <string.h> |
| 31 | #include <stdint.h> |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 32 | #if CONFIG_LOGICAL_CPUS |
Stefan Reinauer | 9a16e3e | 2010-03-29 14:45:36 +0000 | [diff] [blame] | 33 | #include <cpu/amd/multicore.h> |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 34 | #endif |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 35 | #include <cpu/amd/amdk8_sysconf.h> |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 36 | #include "mb_sysconf.h" |
| 37 | |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 38 | static void *smp_write_config_table(void *v) |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 39 | { |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 40 | struct mp_config_table *mc; |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 41 | struct mb_sysconf_t *m; |
Patrick Georgi | 5244e1b | 2010-11-21 14:41:07 +0000 | [diff] [blame] | 42 | int bus_isa; |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 43 | |
| 44 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 45 | |
Patrick Georgi | c8feedd | 2012-02-16 18:43:25 +0100 | [diff] [blame] | 46 | mptable_init(mc, LOCAL_APIC_ADDR); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 47 | |
| 48 | smp_write_processors(mc); |
| 49 | |
| 50 | get_bus_conf(); |
| 51 | m = sysconf.mb; |
| 52 | |
Patrick Georgi | 5244e1b | 2010-11-21 14:41:07 +0000 | [diff] [blame] | 53 | mptable_write_buses(mc, NULL, &bus_isa); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 54 | |
| 55 | /*I/O APICs: APIC ID Version State Address*/ |
| 56 | { |
| 57 | device_t dev = 0; |
| 58 | int i; |
| 59 | struct resource *res; |
| 60 | for(i=0; i<3; i++) { |
| 61 | dev = dev_find_device(0x1166, 0x0235, dev); |
| 62 | if (dev) { |
| 63 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 64 | if (res) { |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 65 | printk(BIOS_DEBUG, "APIC %d base address: %llx\n",m->apicid_bcm5785[i], res->base); |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 66 | smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11, |
| 67 | res2mmio(res, 0, 0)); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 68 | } |
| 69 | } |
| 70 | } |
| 71 | |
| 72 | } |
| 73 | |
| 74 | /* IRQ routing as factory BIOS */ |
| 75 | outb(0x01, 0xc00); outb(0x0A, 0xc01); |
| 76 | outb(0x17, 0xc00); outb(0x05, 0xc01); |
| 77 | /* outb(0x2E, 0xc00); outb(0x0B, 0xc01); */ |
| 78 | /* outb(0x07, 0xc00); outb(0x07, 0xc01); */ |
| 79 | outb(0x07, 0xc00); outb(0x0b, 0xc01); |
| 80 | |
| 81 | outb(0x24, 0xc00); outb(0x05, 0xc01); |
| 82 | //outb(0x00, 0xc00); outb(0x09, 0xc01); |
| 83 | outb(0x02, 0xc00); outb(0x0E, 0xc01); |
| 84 | |
| 85 | // 8259 registers... |
| 86 | outb(0xa0, 0x4d0); |
| 87 | outb(0x0e, 0x4d1); |
| 88 | |
| 89 | { |
| 90 | device_t dev; |
| 91 | dev = dev_find_device(0x1166, 0x0205, 0); |
| 92 | if(dev) { |
| 93 | uint32_t dword; |
| 94 | dword = pci_read_config32(dev, 0x64); |
| 95 | dword |= (1<<30); // GEVENT14-21 used as PCI IRQ0-7 |
| 96 | pci_write_config32(dev, 0x64, dword); |
| 97 | } |
| 98 | // set GEVENT pins to NO OP |
| 99 | outb(0x33, 0xcd6); outb(0x00, 0xcd7); |
| 100 | outb(0x34, 0xcd6); outb(0x00, 0xcd7); |
| 101 | outb(0x35, 0xcd6); outb(0x00, 0xcd7); |
| 102 | } |
| 103 | |
| 104 | // hide XIOAPIC PCI configuration space |
| 105 | { |
| 106 | device_t dev; |
| 107 | dev = dev_find_device(0x1166, 0x205, 0); |
| 108 | if (dev) { |
| 109 | uint32_t dword; |
| 110 | dword = pci_read_config32(dev, 0x64); |
| 111 | dword |= (1<<26); |
| 112 | pci_write_config32(dev, 0x64, dword); |
| 113 | } |
| 114 | } |
| 115 | |
Patrick Georgi | 5244e1b | 2010-11-21 14:41:07 +0000 | [diff] [blame] | 116 | mptable_add_isa_interrupts(mc, bus_isa, m->apicid_bcm5785[0], 0); |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 117 | |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 118 | //SATA |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 119 | /* printk(BIOS_DEBUG, "MPTABLE_SATA: bus_id:%d irq:%d apic_id:%d pin:%d\n",m->bus_bcm5785_1, (0x0e<<2)|0, m->apicid_bcm5785[0], 0x7); */ |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 120 | /* smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0x0e<<2)|0, m->apicid_bcm5785[0], 0x7); */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 121 | printk(BIOS_DEBUG, "MPTABLE_SATA: bus_id:%d irq:%d apic_id:%d pin:%d\n",m->bus_bcm5785_1, (0x0e<<2)|0, m->apicid_bcm5785[0], 0xb); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 122 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0x0e<<2)|0, m->apicid_bcm5785[0], 0xb); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 123 | //USB |
Elyes HAOUAS | aedcc10 | 2014-07-21 08:07:19 +0200 | [diff] [blame] | 124 | printk(BIOS_DEBUG, "sysconf.sbdn: %d on bus: %x\n",sysconf.sbdn, m->bus_bcm5785_0); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 125 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x03<<2)|0, m->apicid_bcm5785[0], 0xa); |
| 126 | |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 127 | //VGA |
| 128 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x4<<2)|0, m->apicid_bcm5785[1], 0x7); |
| 129 | |
| 130 | //PCIE |
| 131 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x6<<2)|0, m->apicid_bcm5785[2], 0xe); |
| 132 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x7<<2)|0, m->apicid_bcm5785[2], 0xe); |
| 133 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x8<<2)|0, m->apicid_bcm5785[2], 0xe); |
| 134 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0x9<<2)|0, m->apicid_bcm5785[2], 0xe); |
| 135 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (0xa<<2)|0, m->apicid_bcm5785[2], 0xe); |
| 136 | |
| 137 | //IDE |
| 138 | // outb(0x02, 0xc00); outb(0x0e, 0xc01); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 139 | // printk(BIOS_DEBUG, "MPTABLE_IDE: bus_id:%d irq:%d apic_id:%d pin:%d\n",m->bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, m->apicid_bcm5785[0], 0xe); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 140 | // smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_bcm5785_0, (0x02<<2)|1, m->apicid_bcm5785[0], 0xe); |
| 141 | |
| 142 | //onboard Broadcom GbE |
| 143 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,8, (4<<2)|0, m->apicid_bcm5785[2], 0x4); |
| 144 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,8, (4<<2)|1, m->apicid_bcm5785[2], 0x4); |
| 145 | |
| 146 | |
| 147 | |
| 148 | /* enable int */ |
| 149 | /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/ |
| 150 | { |
| 151 | device_t dev; |
| 152 | dev = dev_find_device(0x1166, 0x0205, 0); |
| 153 | if(dev) { |
| 154 | uint32_t dword; |
| 155 | dword = pci_read_config32(dev, 0x6c); |
| 156 | dword |= (1<<4); // enable interrupts |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 157 | printk(BIOS_DEBUG, "6ch: %x\n",dword); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 158 | pci_write_config32(dev, 0x6c, dword); |
| 159 | } |
| 160 | } |
| 161 | |
| 162 | /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |
Patrick Georgi | 5244e1b | 2010-11-21 14:41:07 +0000 | [diff] [blame] | 163 | printk(BIOS_DEBUG, "bus_isa is: %x\n", bus_isa); |
Patrick Georgi | 6eb7a53 | 2011-10-07 21:42:52 +0200 | [diff] [blame] | 164 | mptable_lintsrc(mc, bus_isa); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 165 | |
| 166 | //extended table entries |
| 167 | smp_write_address_space(mc,0 , ADDRESS_TYPE_IO, 0x0, 0x0, 0x0, 0x0001); |
| 168 | smp_write_address_space(mc,0 , ADDRESS_TYPE_MEM, 0x0, 0x7f80, 0x0, 0x5e80); |
| 169 | smp_write_address_space(mc,0 , ADDRESS_TYPE_PREFETCH, 0x0, 0xde00, 0x0, 0x0100); |
| 170 | smp_write_address_space(mc,0 , ADDRESS_TYPE_MEM, 0x0, 0xdf00, 0x0, 0x1fe0); |
| 171 | smp_write_address_space(mc,0 , ADDRESS_TYPE_MEM, 0x1000, 0xfee0, 0xf000, 0x011f); |
| 172 | smp_write_address_space(mc,0 , ADDRESS_TYPE_MEM, 0x0, 0x000a, 0x0, 0x0006); |
| 173 | smp_write_bus_hierarchy(mc, 9, 0x01, 0); |
| 174 | smp_write_compatibility_address_space(mc, 0, ADDRESS_RANGE_ADD, 0); |
| 175 | smp_write_compatibility_address_space(mc, 0, ADDRESS_RANGE_ADD, 1); |
| 176 | |
| 177 | |
| 178 | /* Compute the checksums */ |
Patrick Georgi | b0a9c5c | 2011-10-07 23:01:55 +0200 | [diff] [blame] | 179 | return mptable_finalize(mc); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 180 | } |
| 181 | |
| 182 | unsigned long write_smp_table(unsigned long addr) |
| 183 | { |
| 184 | void *v; |
Patrick Georgi | c75c79b | 2011-10-07 22:41:07 +0200 | [diff] [blame] | 185 | v = smp_write_floating_table(addr, 0); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 186 | return (unsigned long)smp_write_config_table(v); |
| 187 | } |