Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 1 | #ifdef GETPIR |
| 2 | #include "pirq_routing.h" |
| 3 | #else |
| 4 | #include <arch/pirq_routing.h> |
| 5 | #endif |
| 6 | |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame] | 7 | static const struct irq_routing_table intel_irq_routing_table = { |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 8 | PIRQ_SIGNATURE, /* u32 signature */ |
| 9 | PIRQ_VERSION, /* u16 version */ |
Uwe Hermann | 95313d8 | 2009-10-07 21:51:33 +0000 | [diff] [blame] | 10 | 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 11 | 0x0, /* Where the interrupt router lies (bus) */ |
| 12 | (0x2<<3)|0x4, |
| 13 | 0, /* IRQs devoted exclusively to PCI usage */ |
| 14 | 0, /* Vendor */ |
| 15 | 0, /* Device */ |
Uwe Hermann | 8fa90ec | 2010-09-21 21:16:27 +0000 | [diff] [blame] | 16 | 0, /* Miniport data */ |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 17 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ |
| 18 | 0x2a, /* u8 checksum. This has to be set to some |
| 19 | value that would give 0 after the sum of all |
| 20 | bytes for this structure (including checksum) */ |
| 21 | { |
| 22 | /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| 23 | {0x00,(0x18<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Host Bridge |
| 24 | {0x00,(0x02<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom ht1000 legacy southbridge |
| 25 | {0x00,(0x03<<3)|0x0, {{0x02, 0x0400}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom ht1000 usb |
| 26 | {0x00,(0x04<<3)|0x0, {{0x18, 0x08a8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // VGA Contr |
| 27 | {0x00,(0x01<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom ht1000 pci/pci-x bridge |
| 28 | {0x01,(0x0e<<3)|0x0, {{0x08, 0x00a0}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom BCM5785 [HT1000] SATA |
| 29 | {0x01,(0x0d<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // BCM5785 [HT1000] PCI/PCI-X Bridge |
| 30 | //{0x02,(0x01<<3)|0x0, {{0x11, 0x08a8}, {0x12, 0x08a8}, {0x13, 0x08a8}, {0x14, 0x008a8}}, 0x2, 0x0}, |
| 31 | {0x00,(0x06<<3)|0x0, {{0x2f, 0x08a8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom HT2100 PCI-Express Bridge |
| 32 | //{0x03,(0x00<<3)|0x0, {{0x21, 0x08a8}, {0x21, 0x08a8}, {0x21, 0x08a8}, {0x21, 0x008a8}}, 0x1, 0x0}, |
| 33 | {0x00,(0x07<<3)|0x0, {{0x2f, 0x08a8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom HT2100 PCI-Express Bridge |
| 34 | {0x00,(0x08<<3)|0x0, {{0x2f, 0x08a8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom HT2100 PCI-Express Bridge |
| 35 | {0x00,(0x09<<3)|0x0, {{0x2f, 0x08a8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom HT2100 PCI-Express Bridge |
| 36 | //{0x06,(0x00<<3)|0x0, {{0x24, 0x08a8}, {0x24, 0x08a8}, {0x24, 0x08a8}, {0x24, 0x008a8}}, 0x2, 0x0}, |
| 37 | {0x00,(0x0a<<3)|0x0, {{0x2f, 0x08a8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Broadcom HT2100 PCI-Express Bridge |
| 38 | //{0x07,(0x00<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, |
| 39 | {0x08,(0x04<<3)|0x0, {{0x25, 0x08a8}, {0x25, 0x08a8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // BCM5715 Gigabit Ethernet |
| 40 | {0x00,(0x18<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // Host Bridge |
| 41 | //{0x10,(0x01<<3)|0x0, {{0x28, 0x8000}, {0x28, 0x8000}, {0x28, 0x8000}, {0x28, 0x08000}}, 0x1, 0x0}, |
| 42 | {0x40,(0x01<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, // HTX slot |
| 43 | } |
| 44 | }; |
| 45 | |
| 46 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 47 | { |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame] | 48 | return copy_pirq_routing_table(addr, &intel_irq_routing_table); |
Mondrian nuessle | 5b34bdd | 2009-04-22 20:34:05 +0000 | [diff] [blame] | 49 | } |