jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright 2014 Rockchip Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 15 | |
| 16 | if BOARD_GOOGLE_VEYRON_RIALTO |
| 17 | |
| 18 | config BOARD_SPECIFIC_OPTIONS # dummy |
| 19 | def_bool y |
Stefan Reinauer | 82c706e | 2015-03-30 12:20:55 -0700 | [diff] [blame] | 20 | select BOARD_ID_AUTO |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 21 | select BOARD_ROMSIZE_KB_4096 |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 22 | select COMMON_CBFS_SPI_WRAPPER |
| 23 | select HAVE_HARD_RESET |
Martin Roth | c0c115b | 2015-08-21 14:37:02 -0600 | [diff] [blame] | 24 | select MAINBOARD_HAS_NATIVE_VGA_INIT |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 25 | select MAINBOARD_DO_NATIVE_VGA_INIT |
| 26 | select MAINBOARD_HAS_CHROMEOS |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 27 | select RAM_CODE_SUPPORT |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 28 | select SOC_ROCKCHIP_RK3288 |
| 29 | select SPI_FLASH |
| 30 | select SPI_FLASH_GIGADEVICE |
| 31 | select SPI_FLASH_WINBOND |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 32 | |
Martin Roth | 967cd9a | 2015-08-18 14:22:58 -0600 | [diff] [blame] | 33 | config CHROMEOS |
| 34 | select CHROMEOS_VBNV_FLASH |
| 35 | select PHYSICAL_REC_SWITCH |
Martin Roth | 8c12d6e | 2015-08-24 15:55:29 -0600 | [diff] [blame] | 36 | select VIRTUAL_DEV_SWITCH |
Martin Roth | 967cd9a | 2015-08-18 14:22:58 -0600 | [diff] [blame] | 37 | |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 38 | config MAINBOARD_DIR |
| 39 | string |
| 40 | default google/veyron_rialto |
| 41 | |
| 42 | config MAINBOARD_PART_NUMBER |
| 43 | string |
| 44 | default "Veyron_Rialto" |
| 45 | |
| 46 | config MAINBOARD_VENDOR |
| 47 | string |
| 48 | default "Google" |
| 49 | |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 50 | config BOOT_MEDIA_SPI_BUS |
Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 51 | int |
| 52 | default 2 |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 53 | |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 54 | config DRIVER_TPM_I2C_BUS |
| 55 | hex |
| 56 | default 0x1 |
| 57 | |
| 58 | config DRIVER_TPM_I2C_ADDR |
| 59 | hex |
| 60 | default 0x20 |
| 61 | |
| 62 | config CONSOLE_SERIAL_UART_ADDRESS |
| 63 | hex |
Patrick Georgi | 01368ed | 2015-04-16 15:27:52 +0200 | [diff] [blame] | 64 | depends on DRIVERS_UART |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 65 | default 0xFF690000 |
| 66 | |
jinkun.hong | 692a2c0 | 2015-01-07 08:57:48 +0800 | [diff] [blame] | 67 | config PMIC_BUS |
| 68 | int |
| 69 | default 0 |
| 70 | |
| 71 | endif # BOARD_GOOGLE_VEYRON_RIALTO |