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ZhengShunQiane4d438e2015-10-22 10:33:13 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Rockchip Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc.
18 */
19
20#include <arch/cache.h>
21#include <arch/io.h>
22#include <boot/coreboot_tables.h>
23#include <console/console.h>
24#include <delay.h>
25#include <device/device.h>
26#include <device/i2c.h>
27#include <edid.h>
28#include <elog.h>
29#include <gpio.h>
30#include <soc/display.h>
31#include <soc/grf.h>
32#include <soc/soc.h>
33#include <soc/pmu.h>
34#include <soc/clock.h>
35#include <soc/rk808.h>
36#include <soc/spi.h>
37#include <soc/i2c.h>
38#include <symbols.h>
39#include <vbe.h>
40#include <vendorcode/google/chromeos/chromeos.h>
41
42#include "board.h"
43
ZhengShunQian0dc117a2015-10-22 10:45:23 +080044static void enable_5v_drv(void)
45{
46 gpio_output(GPIO(7, A, 3), 1); /* 5v_drv enable */
47}
48
49static void configure_sdmmc(void)
50{
51 write32(&rk3288_grf->iomux_sdmmc0, IOMUX_SDMMC0);
52
53 /* use sdmmc0 io, disable JTAG function */
54 write32(&rk3288_grf->soc_con0, RK_CLRBITS(1 << 12));
55
56 sdmmc_power_on();
57
58 gpio_input(GPIO(7, A, 5)); /* SDMMC_DET_L */
59}
60
ZhengShunQiane4d438e2015-10-22 10:33:13 +080061static void configure_usb(void)
62{
ZhengShunQian0dc117a2015-10-22 10:45:23 +080063 gpio_output(GPIO(2, B, 2), 1); /* USB3_PWR_EN */
64 gpio_output(GPIO(2, B, 3), 1); /* USB2_PWR_EN */
ZhengShunQiane4d438e2015-10-22 10:33:13 +080065}
66
67static void configure_emmc(void)
68{
69 write32(&rk3288_grf->iomux_emmcdata, IOMUX_EMMCDATA);
70 write32(&rk3288_grf->iomux_emmcpwren, IOMUX_EMMCPWREN);
71 write32(&rk3288_grf->iomux_emmccmd, IOMUX_EMMCCMD);
72
73 gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */
74}
75
76static void configure_i2s(void)
77{
78 write32(&rk3288_grf->iomux_i2s, IOMUX_I2S);
79 write32(&rk3288_grf->iomux_i2sclk, IOMUX_I2SCLK);
80
81 /* AUDIO IO domain 1.8V voltage selection */
82 write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 6));
83 rkclk_configure_i2s(12288000);
84}
85
86static void configure_vop(void)
87{
88 write32(&rk3288_grf->iomux_lcdc, IOMUX_LCDC);
89
90 /* lcdc(vop) iodomain select 1.8V */
91 write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 0));
92
93 rk808_configure_ldo(8, 1800); /* VCC18_LCD (HDMI_AVDD_1V8) */
94 rk808_configure_ldo(7, 1000); /* VDD10_LCD (HDMI_AVDD_1V0) */
95 rk808_configure_switch(1, 1); /* VCC33_LCD */
96}
97
98static void configure_hdmi(void)
99{
100 /* HDMI I2C */
101 write32(&rk3288_grf->iomux_i2c5sda, IOMUX_HDMI_EDP_I2C_SDA);
102 write32(&rk3288_grf->iomux_i2c5scl, IOMUX_HDMI_EDP_I2C_SCL);
103
ZhengShunQian0dc117a2015-10-22 10:45:23 +0800104 gpio_output(GPIO(7, A, 2), 1); /* POWER_HDMI_ON */
ZhengShunQiane4d438e2015-10-22 10:33:13 +0800105}
106
107static void mainboard_init(device_t dev)
108{
109 gpio_output(GPIO_RESET, 0);
110
ZhengShunQian0dc117a2015-10-22 10:45:23 +0800111 enable_5v_drv();
ZhengShunQiane4d438e2015-10-22 10:33:13 +0800112 configure_usb();
ZhengShunQian0dc117a2015-10-22 10:45:23 +0800113 configure_sdmmc();
ZhengShunQiane4d438e2015-10-22 10:33:13 +0800114 configure_emmc();
115 configure_i2s();
116 configure_vop();
117 configure_hdmi();
118
119 elog_init();
120 elog_add_watchdog_reset();
121 elog_add_boot_reason();
ZhengShunQiane4d438e2015-10-22 10:33:13 +0800122}
123
124static void mainboard_enable(device_t dev)
125{
126 dev->ops->init = &mainboard_init;
127}
128
129struct chip_operations mainboard_ops = {
130 .enable_dev = mainboard_enable,
131};
132
133void lb_board(struct lb_header *header)
134{
135 struct lb_range *dma;
136
137 dma = (struct lb_range *)lb_new_record(header);
138 dma->tag = LB_TAB_DMA;
139 dma->size = sizeof(*dma);
140 dma->range_start = (uintptr_t)_dma_coherent;
141 dma->range_size = _dma_coherent_size;
ZhengShunQian71c0aa22015-11-10 16:16:14 +0800142
143 if (IS_ENABLED(CONFIG_CHROMEOS)) {
144 /* Retrieve the MAC addr which would pass to DTS. */
145 lb_table_add_macs_from_vpd(header);
146 }
ZhengShunQiane4d438e2015-10-22 10:33:13 +0800147}
148
149void mainboard_power_on_backlight(void)
150{
151 return;
152}