ZhengShunQian | e4d438e | 2015-10-22 10:33:13 +0800 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright 2014 Rockchip Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc. |
| 18 | ## |
| 19 | |
| 20 | if BOARD_GOOGLE_VEYRON_EMILE |
| 21 | |
| 22 | config BOARD_SPECIFIC_OPTIONS # dummy |
| 23 | def_bool y |
| 24 | select BOARD_ID_AUTO |
| 25 | select BOARD_ROMSIZE_KB_4096 |
| 26 | select COMMON_CBFS_SPI_WRAPPER |
| 27 | select HAVE_HARD_RESET |
| 28 | select MAINBOARD_DO_NATIVE_VGA_INIT |
| 29 | select MAINBOARD_HAS_CHROMEOS |
ZhengShunQian | e4d438e | 2015-10-22 10:33:13 +0800 | [diff] [blame] | 30 | select RAM_CODE_SUPPORT |
| 31 | select SOC_ROCKCHIP_RK3288 |
| 32 | select SPI_FLASH |
| 33 | select SPI_FLASH_GIGADEVICE |
| 34 | select SPI_FLASH_WINBOND |
Martin Roth | f730e44 | 2015-11-18 16:13:12 -0700 | [diff] [blame] | 35 | select MAINBOARD_HAS_NATIVE_VGA_INIT |
| 36 | |
| 37 | config CHROMEOS |
ZhengShunQian | e4d438e | 2015-10-22 10:33:13 +0800 | [diff] [blame] | 38 | select CHROMEOS_VBNV_FLASH |
Martin Roth | f730e44 | 2015-11-18 16:13:12 -0700 | [diff] [blame] | 39 | select PHYSICAL_REC_SWITCH |
| 40 | select VIRTUAL_DEV_SWITCH |
ZhengShunQian | e4d438e | 2015-10-22 10:33:13 +0800 | [diff] [blame] | 41 | |
| 42 | config MAINBOARD_DIR |
| 43 | string |
| 44 | default google/veyron_emile |
| 45 | |
| 46 | config MAINBOARD_PART_NUMBER |
| 47 | string |
| 48 | default "Veyron_emile" |
| 49 | |
| 50 | config MAINBOARD_VENDOR |
| 51 | string |
| 52 | default "Google" |
| 53 | |
| 54 | config BOOT_MEDIA_SPI_BUS |
| 55 | int |
| 56 | default 2 |
| 57 | |
| 58 | config DRIVER_TPM_I2C_BUS |
| 59 | hex |
| 60 | default 0x1 |
| 61 | |
| 62 | config DRIVER_TPM_I2C_ADDR |
| 63 | hex |
| 64 | default 0x20 |
| 65 | |
| 66 | config CONSOLE_SERIAL_UART_ADDRESS |
| 67 | hex |
| 68 | depends on DRIVERS_UART |
| 69 | default 0xFF690000 |
| 70 | |
| 71 | config PMIC_BUS |
| 72 | int |
| 73 | default 0 |
| 74 | |
| 75 | endif # BOARD_GOOGLE_VEYRON_EMILE |