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Duncan Laurieddc3e422013-10-02 16:10:54 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2010 coresystems GmbH
Duncan Laurie25c6f752014-05-22 08:25:36 -07005 * Copyright (C) 2014 Google Inc.
Duncan Laurieddc3e422013-10-02 16:10:54 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Duncan Laurieddc3e422013-10-02 16:10:54 -070015 */
16
Duncan Laurieddc3e422013-10-02 16:10:54 -070017#include <cbfs.h>
18#include <console/console.h>
Duncan Laurie2663a552014-05-14 15:59:37 -070019#include <string.h>
20#include <ec/google/chromeec/ec.h>
Julius Werner4ee4bd52014-10-20 13:46:39 -070021#include <soc/cpu.h>
22#include <soc/gpio.h>
23#include <soc/pei_data.h>
24#include <soc/pei_wrapper.h>
25#include <soc/pm.h>
26#include <soc/romstage.h>
Duncan Lauriefe8b7882014-05-22 08:22:51 -070027#include <mainboard/google/samus/spd/spd.h>
Duncan Laurie25c6f752014-05-22 08:25:36 -070028#include <mainboard/google/samus/gpio.h>
Duncan Laurie43276242014-11-11 08:31:26 -080029#include <ec/google/chromeec/ec.h>
30#include "board_version.h"
Duncan Laurieddc3e422013-10-02 16:10:54 -070031
Duncan Laurie2663a552014-05-14 15:59:37 -070032void mainboard_romstage_entry(struct romstage_params *rp)
33{
34 struct pei_data pei_data;
35
Duncan Laurie515d3d22014-07-15 13:36:52 -070036 post_code(0x31);
37
38 if (rp->power_state->prev_sleep_state != SLEEP_STATE_S3)
39 google_chromeec_kbbacklight(100);
Duncan Laurie2663a552014-05-14 15:59:37 -070040
Duncan Laurie43276242014-11-11 08:31:26 -080041 printk(BIOS_INFO, "MLB: board version %s\n", samus_board_version());
Duncan Laurie25c6f752014-05-22 08:25:36 -070042
Duncan Laurief6d7baa2014-09-18 12:56:04 -070043 /* Ensure the EC and PD are in the right mode for recovery */
Duncan Laurie2663a552014-05-14 15:59:37 -070044 google_chromeec_early_init();
45
46 /* Initialize GPIOs */
47 init_gpios(mainboard_gpio_config);
48
49 /* Fill out PEI DATA */
50 memset(&pei_data, 0, sizeof(pei_data));
51 mainboard_fill_pei_data(&pei_data);
52 mainboard_fill_spd_data(&pei_data);
53 rp->pei_data = &pei_data;
54
Duncan Laurie6a342cb2014-07-15 13:40:21 -070055 /* Initalize memory */
Duncan Laurie2663a552014-05-14 15:59:37 -070056 romstage_common(rp);
Duncan Laurieddc3e422013-10-02 16:10:54 -070057
Duncan Laurie808a2542014-07-15 13:41:18 -070058 /* Bring SSD out of reset */
59 set_gpio(SAMUS_GPIO_SSD_RESET_L, GPIO_OUT_HIGH);
60
Duncan Laurieddc3e422013-10-02 16:10:54 -070061 /*
Duncan Laurie2663a552014-05-14 15:59:37 -070062 * Enable PP3300_AUTOBAHN_EN after initial GPIO setup
63 * to prevent possible brownout.
Duncan Laurieddc3e422013-10-02 16:10:54 -070064 */
Duncan Laurie2663a552014-05-14 15:59:37 -070065 set_gpio(SAMUS_GPIO_PP3300_AUTOBAHN_EN, GPIO_OUT_HIGH);
Duncan Laurieddc3e422013-10-02 16:10:54 -070066}