Duncan Laurie | 2663a55 | 2014-05-14 15:59:37 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Duncan Laurie | 2663a55 | 2014-05-14 15:59:37 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <stdint.h> |
| 17 | #include <string.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 18 | #include <soc/gpio.h> |
| 19 | #include <soc/pei_data.h> |
| 20 | #include <soc/pei_wrapper.h> |
Duncan Laurie | 2663a55 | 2014-05-14 15:59:37 -0700 | [diff] [blame] | 21 | |
| 22 | void mainboard_fill_pei_data(struct pei_data *pei_data) |
| 23 | { |
| 24 | /* DQ byte map for Samus board */ |
| 25 | const u8 dq_map[2][6][2] = { |
| 26 | { { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 }, |
| 27 | { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } }, |
| 28 | { { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 }, |
| 29 | { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } } }; |
| 30 | /* DQS CPU<>DRAM map for Samus board */ |
| 31 | const u8 dqs_map[2][8] = { |
| 32 | { 2, 0, 1, 3, 6, 4, 7, 5 }, |
| 33 | { 2, 1, 0, 3, 6, 5, 4, 7 } }; |
| 34 | |
| 35 | pei_data->ec_present = 1; |
| 36 | |
| 37 | /* One installed DIMM per channel */ |
| 38 | pei_data->dimm_channel0_disabled = 2; |
| 39 | pei_data->dimm_channel1_disabled = 2; |
| 40 | |
| 41 | memcpy(pei_data->dq_map, dq_map, sizeof(dq_map)); |
| 42 | memcpy(pei_data->dqs_map, dqs_map, sizeof(dqs_map)); |
| 43 | |
| 44 | /* P0: HOST PORT */ |
| 45 | pei_data_usb2_port(pei_data, 0, 0x0080, 1, 0, |
| 46 | USB_PORT_BACK_PANEL); |
| 47 | /* P1: HOST PORT */ |
| 48 | pei_data_usb2_port(pei_data, 1, 0x0080, 1, 1, |
| 49 | USB_PORT_BACK_PANEL); |
Duncan Laurie | 25c6f75 | 2014-05-22 08:25:36 -0700 | [diff] [blame] | 50 | /* P2: RAIDEN */ |
| 51 | pei_data_usb2_port(pei_data, 2, 0x0080, 1, USB_OC_PIN_SKIP, |
| 52 | USB_PORT_BACK_PANEL); |
Duncan Laurie | 2663a55 | 2014-05-14 15:59:37 -0700 | [diff] [blame] | 53 | /* P3: SD CARD */ |
Duncan Laurie | 25c6f75 | 2014-05-22 08:25:36 -0700 | [diff] [blame] | 54 | pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP, |
Duncan Laurie | 2663a55 | 2014-05-14 15:59:37 -0700 | [diff] [blame] | 55 | USB_PORT_INTERNAL); |
Duncan Laurie | 25c6f75 | 2014-05-22 08:25:36 -0700 | [diff] [blame] | 56 | /* P4: RAIDEN */ |
| 57 | pei_data_usb2_port(pei_data, 4, 0x0080, 1, USB_OC_PIN_SKIP, |
| 58 | USB_PORT_BACK_PANEL); |
Duncan Laurie | d3f1579 | 2014-12-10 08:11:56 -0800 | [diff] [blame] | 59 | /* P5: WWAN (Disabled) */ |
| 60 | pei_data_usb2_port(pei_data, 5, 0x0000, 0, USB_OC_PIN_SKIP, |
| 61 | USB_PORT_SKIP); |
Duncan Laurie | 2663a55 | 2014-05-14 15:59:37 -0700 | [diff] [blame] | 62 | /* P6: CAMERA */ |
| 63 | pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP, |
| 64 | USB_PORT_INTERNAL); |
| 65 | /* P7: BT */ |
| 66 | pei_data_usb2_port(pei_data, 7, 0x0040, 1, USB_OC_PIN_SKIP, |
| 67 | USB_PORT_INTERNAL); |
| 68 | |
| 69 | /* P1: HOST PORT */ |
| 70 | pei_data_usb3_port(pei_data, 0, 1, 0, 0); |
| 71 | /* P2: HOST PORT */ |
| 72 | pei_data_usb3_port(pei_data, 1, 1, 1, 0); |
Duncan Laurie | 25c6f75 | 2014-05-22 08:25:36 -0700 | [diff] [blame] | 73 | /* P3: RAIDEN */ |
| 74 | pei_data_usb3_port(pei_data, 2, 1, USB_OC_PIN_SKIP, 0); |
| 75 | /* P4: RAIDEN */ |
| 76 | pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0); |
Duncan Laurie | 2663a55 | 2014-05-14 15:59:37 -0700 | [diff] [blame] | 77 | } |