blob: b3ca14c8903ec18c4121ee282a7ebd8ebad402ac [file] [log] [blame]
Aaron Durbin072e0cc2014-07-14 19:09:23 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Google Inc.
5 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Aaron Durbin072e0cc2014-07-14 19:09:23 -050015 */
16
17#include <console/console.h>
18#include <delay.h>
19#include <device/i2c.h>
20#include <stdint.h>
21#include <stdlib.h>
Julius Werner96195ee2014-10-20 13:25:21 -070022
Aaron Durbin072e0cc2014-07-14 19:09:23 -050023#include "pmic.h"
24#include "reset.h"
25
Jimmy Zhangae272292014-10-31 18:26:11 -070026#define PAGE_ADDR(reg) ((reg >> 8) & 0xff)
27#define PAGE_OFFSET(reg) (reg & 0xff)
Aaron Durbin072e0cc2014-07-14 19:09:23 -050028
Tom Warrena6ca9352014-07-16 11:09:39 -070029struct ti65913_init_reg {
Jimmy Zhangae272292014-10-31 18:26:11 -070030 u16 reg;
Aaron Durbin072e0cc2014-07-14 19:09:23 -050031 u8 val;
32 u8 delay;
33};
34
Tom Warrena6ca9352014-07-16 11:09:39 -070035static struct ti65913_init_reg init_list[] = {
36//TODO(twarren@nvidia.com): Add slams back to defaults
Tom Warrena6ca9352014-07-16 11:09:39 -070037// {TI65913_SMPS12_VOLTAGE, 0x38, 0},
Jimmy Zhangae272292014-10-31 18:26:11 -070038// {TI65913_SMPS12_CTRL, 0x01, 1},
Tom Warrena6ca9352014-07-16 11:09:39 -070039//etc.
Aaron Durbin072e0cc2014-07-14 19:09:23 -050040};
41
Jimmy Zhangae272292014-10-31 18:26:11 -070042int pmic_read_reg(unsigned bus, uint16_t reg, uint8_t *data)
Aaron Durbin072e0cc2014-07-14 19:09:23 -050043{
Jimmy Zhangae272292014-10-31 18:26:11 -070044 if (i2c_readb(bus, PAGE_ADDR(reg), PAGE_OFFSET(reg), data)) {
45 printk(BIOS_ERR, "%s: page = 0x%02X, reg = 0x%02X failed!\n",
46 __func__, PAGE_ADDR(reg), PAGE_OFFSET(reg));
47 return -1;
48 }
49 return 0;
50}
51
52void pmic_write_reg(unsigned bus, uint16_t reg, uint8_t val, int delay)
53{
54 if (i2c_writeb(bus, PAGE_ADDR(reg), PAGE_OFFSET(reg), val)) {
55 printk(BIOS_ERR, "%s: page = 0x%02X, reg = 0x%02X, "
56 "value = 0x%02X failed!\n",
57 __func__, PAGE_ADDR(reg), PAGE_OFFSET(reg), val);
Aaron Durbin072e0cc2014-07-14 19:09:23 -050058 /* Reset the SoC on any PMIC write error */
59 cpu_reset();
60 } else {
61 if (delay)
62 udelay(500);
63 }
64}
65
66static void pmic_slam_defaults(unsigned bus)
67{
68 int i;
Tom Warrena6ca9352014-07-16 11:09:39 -070069
Aaron Durbin072e0cc2014-07-14 19:09:23 -050070 for (i = 0; i < ARRAY_SIZE(init_list); i++) {
Tom Warrena6ca9352014-07-16 11:09:39 -070071 struct ti65913_init_reg *reg = &init_list[i];
Aaron Durbin072e0cc2014-07-14 19:09:23 -050072 pmic_write_reg(bus, reg->reg, reg->val, reg->delay);
73 }
74}
75
76void pmic_init(unsigned bus)
77{
Aaron Durbin072e0cc2014-07-14 19:09:23 -050078 /* Restore PMIC POR defaults, in case kernel changed 'em */
79 pmic_slam_defaults(bus);
80
Tom Warrena6ca9352014-07-16 11:09:39 -070081 /* A44: Set VDD_CPU to 1.0V. */
Tom Warrena6ca9352014-07-16 11:09:39 -070082 pmic_write_reg(bus, TI65913_SMPS12_VOLTAGE, 0x38, 0);
Jimmy Zhangae272292014-10-31 18:26:11 -070083 pmic_write_reg(bus, TI65913_SMPS12_CTRL, 0x01, 1);
Aaron Durbin072e0cc2014-07-14 19:09:23 -050084
85 printk(BIOS_DEBUG, "PMIC init done\n");
86}