Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Google Inc. |
| 5 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <console/console.h> |
| 18 | #include <delay.h> |
| 19 | #include <device/i2c.h> |
| 20 | #include <stdint.h> |
| 21 | #include <stdlib.h> |
Julius Werner | 96195ee | 2014-10-20 13:25:21 -0700 | [diff] [blame] | 22 | |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 23 | #include "pmic.h" |
| 24 | #include "reset.h" |
| 25 | |
Jimmy Zhang | ae27229 | 2014-10-31 18:26:11 -0700 | [diff] [blame] | 26 | #define PAGE_ADDR(reg) ((reg >> 8) & 0xff) |
| 27 | #define PAGE_OFFSET(reg) (reg & 0xff) |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 28 | |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 29 | struct ti65913_init_reg { |
Jimmy Zhang | ae27229 | 2014-10-31 18:26:11 -0700 | [diff] [blame] | 30 | u16 reg; |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 31 | u8 val; |
| 32 | u8 delay; |
| 33 | }; |
| 34 | |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 35 | static struct ti65913_init_reg init_list[] = { |
| 36 | //TODO(twarren@nvidia.com): Add slams back to defaults |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 37 | // {TI65913_SMPS12_VOLTAGE, 0x38, 0}, |
Jimmy Zhang | ae27229 | 2014-10-31 18:26:11 -0700 | [diff] [blame] | 38 | // {TI65913_SMPS12_CTRL, 0x01, 1}, |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 39 | //etc. |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 40 | }; |
| 41 | |
Jimmy Zhang | ae27229 | 2014-10-31 18:26:11 -0700 | [diff] [blame] | 42 | int pmic_read_reg(unsigned bus, uint16_t reg, uint8_t *data) |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 43 | { |
Jimmy Zhang | ae27229 | 2014-10-31 18:26:11 -0700 | [diff] [blame] | 44 | if (i2c_readb(bus, PAGE_ADDR(reg), PAGE_OFFSET(reg), data)) { |
| 45 | printk(BIOS_ERR, "%s: page = 0x%02X, reg = 0x%02X failed!\n", |
| 46 | __func__, PAGE_ADDR(reg), PAGE_OFFSET(reg)); |
| 47 | return -1; |
| 48 | } |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | void pmic_write_reg(unsigned bus, uint16_t reg, uint8_t val, int delay) |
| 53 | { |
| 54 | if (i2c_writeb(bus, PAGE_ADDR(reg), PAGE_OFFSET(reg), val)) { |
| 55 | printk(BIOS_ERR, "%s: page = 0x%02X, reg = 0x%02X, " |
| 56 | "value = 0x%02X failed!\n", |
| 57 | __func__, PAGE_ADDR(reg), PAGE_OFFSET(reg), val); |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 58 | /* Reset the SoC on any PMIC write error */ |
| 59 | cpu_reset(); |
| 60 | } else { |
| 61 | if (delay) |
| 62 | udelay(500); |
| 63 | } |
| 64 | } |
| 65 | |
| 66 | static void pmic_slam_defaults(unsigned bus) |
| 67 | { |
| 68 | int i; |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 69 | |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 70 | for (i = 0; i < ARRAY_SIZE(init_list); i++) { |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 71 | struct ti65913_init_reg *reg = &init_list[i]; |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 72 | pmic_write_reg(bus, reg->reg, reg->val, reg->delay); |
| 73 | } |
| 74 | } |
| 75 | |
| 76 | void pmic_init(unsigned bus) |
| 77 | { |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 78 | /* Restore PMIC POR defaults, in case kernel changed 'em */ |
| 79 | pmic_slam_defaults(bus); |
| 80 | |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 81 | /* A44: Set VDD_CPU to 1.0V. */ |
Tom Warren | a6ca935 | 2014-07-16 11:09:39 -0700 | [diff] [blame] | 82 | pmic_write_reg(bus, TI65913_SMPS12_VOLTAGE, 0x38, 0); |
Jimmy Zhang | ae27229 | 2014-10-31 18:26:11 -0700 | [diff] [blame] | 83 | pmic_write_reg(bus, TI65913_SMPS12_CTRL, 0x01, 1); |
Aaron Durbin | 072e0cc | 2014-07-14 19:09:23 -0500 | [diff] [blame] | 84 | |
| 85 | printk(BIOS_DEBUG, "PMIC init done\n"); |
| 86 | } |