Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 16 | #include <cbmem.h> |
Matt DeVillier | ae141dd | 2014-07-13 18:51:28 -0500 | [diff] [blame] | 17 | #include <string.h> |
| 18 | #include <types.h> |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 19 | #include <arch/acpi.h> |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 20 | #include <arch/acpigen.h> |
Matt DeVillier | ae141dd | 2014-07-13 18:51:28 -0500 | [diff] [blame] | 21 | #include <arch/ioapic.h> |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 22 | #include <arch/smp/mpspec.h> |
Matt DeVillier | ae141dd | 2014-07-13 18:51:28 -0500 | [diff] [blame] | 23 | #include <console/console.h> |
| 24 | #include <cpu/cpu.h> |
| 25 | #include <cpu/x86/msr.h> |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 26 | #include <device/device.h> |
| 27 | #include <device/pci.h> |
| 28 | #include <device/pci_ids.h> |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 29 | #include <ec/google/chromeec/ec.h> |
Matt DeVillier | ae141dd | 2014-07-13 18:51:28 -0500 | [diff] [blame] | 30 | #include <southbridge/intel/lynxpoint/nvs.h> |
| 31 | #include <southbridge/intel/lynxpoint/pch.h> |
| 32 | #include <vendorcode/google/chromeos/gnvs.h> |
| 33 | #include "thermal.h" |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 34 | |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 35 | static void acpi_update_thermal_table(global_nvs_t *gnvs) |
| 36 | { |
| 37 | gnvs->f4of = FAN4_THRESHOLD_OFF; |
| 38 | gnvs->f4on = FAN4_THRESHOLD_ON; |
| 39 | gnvs->f4pw = FAN4_PWM; |
| 40 | |
| 41 | gnvs->f3of = FAN3_THRESHOLD_OFF; |
| 42 | gnvs->f3on = FAN3_THRESHOLD_ON; |
| 43 | gnvs->f3pw = FAN3_PWM; |
| 44 | |
| 45 | gnvs->f2of = FAN2_THRESHOLD_OFF; |
| 46 | gnvs->f2on = FAN2_THRESHOLD_ON; |
| 47 | gnvs->f2pw = FAN2_PWM; |
| 48 | |
| 49 | gnvs->f1of = FAN1_THRESHOLD_OFF; |
| 50 | gnvs->f1on = FAN1_THRESHOLD_ON; |
| 51 | gnvs->f1pw = FAN1_PWM; |
| 52 | |
| 53 | gnvs->f0of = FAN0_THRESHOLD_OFF; |
| 54 | gnvs->f0on = FAN0_THRESHOLD_ON; |
| 55 | gnvs->f0pw = FAN0_PWM; |
| 56 | |
| 57 | gnvs->tcrt = CRITICAL_TEMPERATURE; |
| 58 | gnvs->tpsv = PASSIVE_TEMPERATURE; |
| 59 | gnvs->tmax = MAX_TEMPERATURE; |
| 60 | gnvs->flvl = 5; |
| 61 | } |
| 62 | |
Vladimir Serbinenko | c6e566a | 2014-08-31 17:43:51 +0200 | [diff] [blame] | 63 | void acpi_create_gnvs(global_nvs_t *gnvs) |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 64 | { |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 65 | /* Enable USB ports in S3 */ |
| 66 | gnvs->s3u0 = 1; |
| 67 | gnvs->s3u1 = 1; |
| 68 | |
| 69 | /* Disable USB ports in S5 */ |
| 70 | gnvs->s5u0 = 0; |
| 71 | gnvs->s5u1 = 0; |
| 72 | |
| 73 | /* TPM Present */ |
| 74 | gnvs->tpmp = 1; |
| 75 | |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 76 | |
| 77 | #if CONFIG_CHROMEOS |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 78 | // SuperIO is always RO |
| 79 | gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; |
| 80 | #endif |
| 81 | |
Mohammed Habibulla | 05497d0 | 2013-10-24 16:44:06 -0700 | [diff] [blame] | 82 | acpi_update_thermal_table(gnvs); |
| 83 | } |
| 84 | |
| 85 | unsigned long acpi_fill_madt(unsigned long current) |
| 86 | { |
| 87 | /* Local APICs */ |
| 88 | current = acpi_create_madt_lapics(current); |
| 89 | |
| 90 | /* IOAPIC */ |
| 91 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, |
| 92 | 2, IO_APIC_ADDR, 0); |
| 93 | |
| 94 | /* INT_SRC_OVR */ |
| 95 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 96 | current, 0, 0, 2, 0); |
| 97 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 98 | current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH); |
| 99 | |
| 100 | return current; |
| 101 | } |