blob: 1020ae71b52fdf574c307e7698747d84bde69a80 [file] [log] [blame]
Duncan Laurie5290f712013-05-22 16:31:09 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2012 Google Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Duncan Laurie5290f712013-05-22 16:31:09 -070015 */
16
17#define ENABLE_TPM
18
19DefinitionBlock(
20 "dsdt.aml",
21 "DSDT",
22 0x02, // DSDT revision: ACPI v2.0
23 "COREv4", // OEM id
24 "COREBOOT", // OEM table id
25 0x20110725 // OEM revision
26)
27{
28 // Some generic macros
29 #include "acpi/platform.asl"
Duncan Laurie5290f712013-05-22 16:31:09 -070030
31 // global NVS and variables
32 #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
33
34 // General Purpose Events
35 //#include "acpi/gpe.asl"
36
37 // CPU
38 #include <cpu/intel/haswell/acpi/cpu.asl>
39
40 Scope (\_SB) {
41 Device (PCI0)
42 {
43 #include <northbridge/intel/haswell/acpi/haswell.asl>
44 #include <southbridge/intel/lynxpoint/acpi/pch.asl>
Nico Huber954a55b2015-08-27 13:31:46 +020045
46 #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
Duncan Laurie5290f712013-05-22 16:31:09 -070047 }
48 }
49
Duncan Laurieb3b008a2014-02-11 10:43:21 -080050 // Mainboard specific
51 #include "acpi/mainboard.asl"
52
Duncan Laurie5290f712013-05-22 16:31:09 -070053 // Thermal handler
54 #include "acpi/thermal.asl"
55
56 // Chrome OS specific
57 #include "acpi/chromeos.asl"
58 #include <vendorcode/google/chromeos/acpi/chromeos.asl>
59
60 // Chipset specific sleep states
61 #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
62}