blob: 8cdb0325d3e394f08b58ddcf36e1ccc02874ec96 [file] [log] [blame]
Duncan Laurie5290f712013-05-22 16:31:09 -07001chip northbridge/intel/haswell
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Duncan Laurie5290f712013-05-22 16:31:09 -07005
6 # Enable eDP Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Disable DisplayPort C Hotplug
10 register "gpu_dp_c_hotplug" = "0x00"
11
12 # Enable HDMI Hotplug with 6ms pulse
13 register "gpu_dp_b_hotplug" = "0x06"
14
15 # Set backlight PWM values for eDP
16 register "gpu_cpu_backlight" = "0x00000200"
17 register "gpu_pch_backlight" = "0x04000000"
18
Duncan Laurie116aa3a2013-05-28 07:55:02 -070019 # Enable Panel and configure power delays
20 register "gpu_panel_port_select" = "1" # eDP
Duncan Laurie39536e92013-06-11 16:17:56 -070021 register "gpu_panel_power_cycle_delay" = "5" # 400ms (T4)
22 register "gpu_panel_power_up_delay" = "600" # 60ms (T1+T2)
23 register "gpu_panel_power_down_delay" = "600" # 60ms (T3+T7)
24 register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms (T5)
25 register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms (T6)
Duncan Laurie116aa3a2013-05-28 07:55:02 -070026
Duncan Laurie5290f712013-05-22 16:31:09 -070027 device cpu_cluster 0 on
Duncan Laurie5290f712013-05-22 16:31:09 -070028 chip cpu/intel/haswell
Matt DeVillier31769d92015-04-30 01:19:16 -050029 device lapic 0 on end
Duncan Laurie5290f712013-05-22 16:31:09 -070030 # Magic APIC ID to locate this chip
31 device lapic 0xACAC off end
32
33 register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E)
Duncan Laurie8d716b92013-07-22 15:33:10 -070034 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
35 register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S)
Duncan Laurie5290f712013-05-22 16:31:09 -070036
37 register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E)
Duncan Laurie8d716b92013-07-22 15:33:10 -070038 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
39 register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S)
Duncan Laurie5290f712013-05-22 16:31:09 -070040 end
41 end
42
43 device domain 0 on
44 device pci 00.0 on end # host bridge
45 device pci 02.0 on end # vga controller
Duncan Laurie0a7c49e2013-06-20 12:40:55 -070046 device pci 03.0 on end # mini-hd audio
Duncan Laurie5290f712013-05-22 16:31:09 -070047
48 chip southbridge/intel/lynxpoint
49 register "pirqa_routing" = "0x8b"
50 register "pirqb_routing" = "0x8a"
51 register "pirqc_routing" = "0x8b"
52 register "pirqd_routing" = "0x8b"
53 register "pirqe_routing" = "0x80"
54 register "pirqf_routing" = "0x80"
55 register "pirqg_routing" = "0x80"
56 register "pirqh_routing" = "0x80"
57
58 # EC range is 0x800-0x9ff
59 register "gen1_dec" = "0x00fc0801"
60 register "gen2_dec" = "0x00fc0901"
61
62 # EC_SMI is GPIO34
63 register "alt_gp_smi_en" = "0x0004"
64 register "gpe0_en_1" = "0x00000000"
65 # EC_SCI is GPIO36
66 register "gpe0_en_2" = "0x00000010"
67 register "gpe0_en_3" = "0x00000000"
68 register "gpe0_en_4" = "0x00000000"
69
70 register "ide_legacy_combined" = "0x0"
71 register "sata_ahci" = "0x1"
72 register "sata_port_map" = "0x1"
73
74 register "sio_acpi_mode" = "0"
75 register "sio_i2c0_voltage" = "0" # 3.3V
76 register "sio_i2c1_voltage" = "0" # 3.3V
77
Duncan Lauried538e8f2013-08-09 09:11:29 -070078 # Force enable ASPM for PCIe Port 1
79 register "pcie_port_force_aspm" = "0x01"
80
Duncan Lauriec45dc1c2013-08-08 15:33:34 -070081 # Disable PCIe CLKOUT 1-5 and CLKOUT_XDP
82 register "icc_clock_disable" = "0x013e0000"
83
Duncan Laurie5290f712013-05-22 16:31:09 -070084 device pci 13.0 off end # Smart Sound Audio DSP
85 device pci 14.0 on end # USB3 XHCI
86 device pci 15.0 on end # Serial I/O DMA
87 device pci 15.1 on end # I2C0
88 device pci 15.2 on end # I2C1
89 device pci 15.3 off end # GSPI0
90 device pci 15.4 off end # GSPI1
91 device pci 15.5 off end # UART0
92 device pci 15.6 off end # UART1
93 device pci 16.0 on end # Management Engine Interface 1
94 device pci 16.1 off end # Management Engine Interface 2
95 device pci 16.2 off end # Management Engine IDE-R
96 device pci 16.3 off end # Management Engine KT
97 device pci 17.0 off end # SDIO
98 device pci 19.0 off end # GbE
99 device pci 1b.0 on end # High Definition Audio
100 device pci 1c.0 on end # PCIe Port #1
101 device pci 1c.1 off end # PCIe Port #2
102 device pci 1c.2 off end # PCIe Port #3
103 device pci 1c.3 off end # PCIe Port #4
104 device pci 1c.4 off end # PCIe Port #5
105 device pci 1c.5 off end # PCIe Port #6
106 device pci 1d.0 on end # USB2 EHCI
107 device pci 1e.0 off end # PCI bridge
108 device pci 1f.0 on
109 chip ec/google/chromeec
110 # We only have one init function that
111 # we need to call to initialize the
112 # keyboard part of the EC.
113 device pnp ff.1 on # dummy address
114 end
115 end
116 end # LPC bridge
117 device pci 1f.2 on end # SATA Controller
Duncan Lauriec14e9612013-08-22 10:19:25 -0700118 device pci 1f.3 on end # SMBus
Duncan Laurie5290f712013-05-22 16:31:09 -0700119 device pci 1f.6 on end # Thermal
120 end
121 end
122end