blob: e11eb39542f866ab2335523f84cb6d03f8ca2acc [file] [log] [blame]
Damien Zammitcbe7a8e2015-08-19 15:23:32 +10001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <southbridge/intel/i82801gx/i82801gx.h>
18
19DefinitionBlock(
20 "dsdt.aml",
21 "DSDT",
22 0x02, // DSDT revision: ACPI v2.0
23 "COREv4", // OEM id
24 "COREBOOT", // OEM table id
25 0x20090419 // OEM revision
26)
27{
28 // global NVS and variables
29 #include "acpi/platform.asl"
30 #include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
31
32 Scope (\_SB) {
33 Device (PCI0)
34 {
35 #include <northbridge/intel/x4x/acpi/x4x.asl>
36 #include <southbridge/intel/i82801gx/acpi/ich7.asl>
37 #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
38 }
39 }
40
41 /* Chipset specific sleep states */
42 #include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
43}