Ronald G. Minnich | fa6c11e | 2007-05-05 03:54:13 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | 344e457 | 2007-05-22 10:12:49 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Uwe Hermann | 344e457 | 2007-05-22 10:12:49 +0000 | [diff] [blame] | 14 | */ |
Ronald G. Minnich | fa6c11e | 2007-05-05 03:54:13 +0000 | [diff] [blame] | 15 | |
| 16 | #include <arch/pirq_routing.h> |
| 17 | #include <console/console.h> |
| 18 | #include <arch/io.h> |
| 19 | #include <arch/pirq_routing.h> |
Uwe Hermann | 5df4168 | 2010-09-25 16:17:20 +0000 | [diff] [blame] | 20 | #include "southbridge/amd/cs5536/cs5536.h" |
Ronald G. Minnich | fa6c11e | 2007-05-05 03:54:13 +0000 | [diff] [blame] | 21 | |
| 22 | /* Platform IRQs */ |
| 23 | #define PIRQA 11 |
| 24 | #define PIRQB 5 |
| 25 | #define PIRQC 10 |
| 26 | #define PIRQD 10 |
| 27 | |
| 28 | /* Map */ |
| 29 | #define M_PIRQA (1 << PIRQA) /* Bitmap of supported IRQs */ |
| 30 | #define M_PIRQB (1 << PIRQB) /* Bitmap of supported IRQs */ |
| 31 | #define M_PIRQC (1 << PIRQC) /* Bitmap of supported IRQs */ |
| 32 | #define M_PIRQD (1 << PIRQD) /* Bitmap of supported IRQs */ |
| 33 | |
| 34 | /* Link */ |
| 35 | #define L_PIRQA 1 /* Means Slot INTx# Connects To Chipset INTA# */ |
| 36 | #define L_PIRQB 2 /* Means Slot INTx# Connects To Chipset INTB# */ |
| 37 | #define L_PIRQC 3 /* Means Slot INTx# Connects To Chipset INTC# */ |
| 38 | #define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */ |
| 39 | |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame] | 40 | static const struct irq_routing_table intel_irq_routing_table = { |
Ronald G. Minnich | 6b83e46 | 2007-05-08 16:04:36 +0000 | [diff] [blame] | 41 | PIRQ_SIGNATURE, /* u32 signature */ |
| 42 | PIRQ_VERSION, /* u16 version */ |
Uwe Hermann | 95313d8 | 2009-10-07 21:51:33 +0000 | [diff] [blame] | 43 | 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ |
Ronald G. Minnich | 6b83e46 | 2007-05-08 16:04:36 +0000 | [diff] [blame] | 44 | 0x00, /* Where the interrupt router lies (bus) */ |
| 45 | (0x0f<<3)|0x0, /* Where the interrupt router lies (dev) */ |
| 46 | 0, /* IRQs devoted exclusively to PCI usage */ |
| 47 | 0x100b, /* Vendor */ |
| 48 | 0x2b, /* Device */ |
Uwe Hermann | 8fa90ec | 2010-09-21 21:16:27 +0000 | [diff] [blame] | 49 | 0, /* Miniport data */ |
Ronald G. Minnich | 6b83e46 | 2007-05-08 16:04:36 +0000 | [diff] [blame] | 50 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ |
| 51 | 0xe, /* u8 checksum. This has to be set to some |
| 52 | value that would give 0 after the sum of all |
| 53 | bytes for this structure (including checksum) */ |
| 54 | { |
| 55 | /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| 56 | {0x00,(0x01<<3)|0x0, {{0x01, 0x0400}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, |
| 57 | {0x00,(0x0f<<3)|0x0, {{0x01, 0x0400}, {0x02, 0x0800}, {0x03, 0x0400}, {0x04, 0x00800}}, 0x0, 0x0}, |
| 58 | {0x00,(0x13<<3)|0x0, {{0x01, 0x0400}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, |
| 59 | {0x00,(0x12<<3)|0x0, {{0x03, 0x0400}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, |
| 60 | {0x00,(0x11<<3)|0x0, {{0x01, 0x0400}, {0x02, 0x0800}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, |
| 61 | {0x00,(0x0a<<3)|0x0, {{0x01, 0x0400}, {0x02, 0x0800}, {0x03, 0x0400}, {0x04, 0x00800}}, 0x1, 0x0}, |
| 62 | {0x00,(0x0b<<3)|0x0, {{0x02, 0x0800}, {0x03, 0x0400}, {0x04, 0x0800}, {0x01, 0x00400}}, 0x2, 0x0}, |
| 63 | {0x00,(0x0c<<3)|0x0, {{0x03, 0x0400}, {0x04, 0x0800}, {0x01, 0x0400}, {0x02, 0x00800}}, 0x3, 0x0}, |
| 64 | {0x00,(0x0d<<3)|0x0, {{0x04, 0x0800}, {0x01, 0x0400}, {0x02, 0x0800}, {0x03, 0x00400}}, 0x4, 0x0}, |
| 65 | } |
Ronald G. Minnich | fa6c11e | 2007-05-05 03:54:13 +0000 | [diff] [blame] | 66 | }; |
| 67 | |
Nikolay Petukhov | 9c2255c | 2008-03-29 16:59:27 +0000 | [diff] [blame] | 68 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 69 | { |
Stefan Reinauer | a47bd91 | 2012-11-15 15:15:15 -0800 | [diff] [blame] | 70 | return copy_pirq_routing_table(addr, &intel_irq_routing_table); |
Ronald G. Minnich | 6b83e46 | 2007-05-08 16:04:36 +0000 | [diff] [blame] | 71 | } |