Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Tobias Diedrich <ranma+coreboot@tdiedrich.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Tobias Diedrich | ca6d808 | 2010-11-29 20:40:33 +0000 | [diff] [blame] | 16 | #include "southbridge/intel/i82371eb/i82371eb.h" |
| 17 | |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 18 | DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1) |
| 19 | { |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 20 | /* |
Tobias Diedrich | 4e22a3b | 2010-12-13 22:39:46 +0100 | [diff] [blame] | 21 | * Intel 82371EB (PIIX4E) datasheet, section 7.2.3, page 142 |
| 22 | * |
| 23 | * 0: soft off/suspend to disk S5 |
| 24 | * 1: suspend to ram S3 |
| 25 | * 2: powered on suspend, context lost S2 |
| 26 | * Note: 'context lost' means the CPU restarts at the reset |
| 27 | * vector |
| 28 | * 3: powered on suspend, CPU context lost S1 |
| 29 | * Note: Looks like 'CPU context lost' does _not_ mean the |
| 30 | * CPU restarts at the reset vector. Most likely only |
| 31 | * caches are lost, so both 0x3 and 0x4 map to acpi S1 |
| 32 | * 4: powered on suspend, context maintained S1 |
| 33 | * 5: working (clock control) S0 |
| 34 | * 6: reserved |
| 35 | * 7: reserved |
| 36 | */ |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 37 | Name (\_S0, Package () { 0x05, 0x05, 0x00, 0x00 }) |
| 38 | Name (\_S1, Package () { 0x03, 0x03, 0x00, 0x00 }) |
| 39 | Name (\_S5, Package () { 0x00, 0x00, 0x00, 0x00 }) |
| 40 | |
Tobias Diedrich | 4e22a3b | 2010-12-13 22:39:46 +0100 | [diff] [blame] | 41 | OperationRegion (SIO1, SystemIO, Add(DEFAULT_PMBASE, GPO0), 2) |
| 42 | Field (SIO1, ByteAcc, NoLock, Preserve) |
| 43 | { |
| 44 | FANP, 1, /* CPU/case fan power */ |
| 45 | Offset (0x01), |
| 46 | PLED, 1, |
| 47 | } |
| 48 | |
| 49 | Method (\_PTS, 1, NotSerialized) |
| 50 | { |
| 51 | /* Disable fan, blink power led */ |
| 52 | Store (Zero, FANP) |
| 53 | Store (Zero, PLED) |
| 54 | } |
| 55 | |
| 56 | Method (\_WAK, 1, NotSerialized) |
| 57 | { |
| 58 | /* Re-enable fan, stop power led blinking */ |
| 59 | Store (One, FANP) |
| 60 | Store (One, PLED) |
| 61 | /* wake OK */ |
| 62 | Return(Package(0x02){0x00, 0x00}) |
| 63 | } |
| 64 | |
Tobias Diedrich | e87c38e | 2010-11-27 09:40:16 +0000 | [diff] [blame] | 65 | /* Root of the bus hierarchy */ |
| 66 | Scope (\_SB) |
| 67 | { |
| 68 | /* Top PCI device */ |
| 69 | Device (PCI0) |
| 70 | { |
| 71 | Name (_HID, EisaId ("PNP0A03")) |
| 72 | Name (_ADR, 0x00) |
| 73 | Name (_UID, 0x00) |
| 74 | Name (_BBN, 0x00) |
| 75 | |
| 76 | /* PCI Routing Table */ |
| 77 | Name (_PRT, Package () { |
| 78 | Package (0x04) { 0x0001FFFF, 0, LNKA, 0 }, |
| 79 | Package (0x04) { 0x0001FFFF, 1, LNKB, 0 }, |
| 80 | Package (0x04) { 0x0001FFFF, 2, LNKC, 0 }, |
| 81 | Package (0x04) { 0x0001FFFF, 3, LNKD, 0 }, |
| 82 | |
| 83 | Package (0x04) { 0x0004FFFF, 0, LNKA, 0 }, |
| 84 | Package (0x04) { 0x0004FFFF, 1, LNKB, 0 }, |
| 85 | Package (0x04) { 0x0004FFFF, 2, LNKC, 0 }, |
| 86 | Package (0x04) { 0x0004FFFF, 3, LNKD, 0 }, |
| 87 | |
| 88 | Package (0x04) { 0x0009FFFF, 0, LNKD, 0 }, |
| 89 | Package (0x04) { 0x0009FFFF, 1, LNKA, 0 }, |
| 90 | Package (0x04) { 0x0009FFFF, 2, LNKB, 0 }, |
| 91 | Package (0x04) { 0x0009FFFF, 3, LNKC, 0 }, |
| 92 | |
| 93 | Package (0x04) { 0x000AFFFF, 0, LNKC, 0 }, |
| 94 | Package (0x04) { 0x000AFFFF, 1, LNKD, 0 }, |
| 95 | Package (0x04) { 0x000AFFFF, 2, LNKA, 0 }, |
| 96 | Package (0x04) { 0x000AFFFF, 3, LNKB, 0 }, |
| 97 | |
| 98 | Package (0x04) { 0x000BFFFF, 0, LNKB, 0 }, |
| 99 | Package (0x04) { 0x000BFFFF, 1, LNKC, 0 }, |
| 100 | Package (0x04) { 0x000BFFFF, 2, LNKD, 0 }, |
| 101 | Package (0x04) { 0x000BFFFF, 3, LNKA, 0 }, |
| 102 | |
| 103 | Package (0x04) { 0x000CFFFF, 0, LNKA, 0 }, |
| 104 | Package (0x04) { 0x000CFFFF, 1, LNKB, 0 }, |
| 105 | Package (0x04) { 0x000CFFFF, 2, LNKC, 0 }, |
| 106 | Package (0x04) { 0x000CFFFF, 3, LNKD, 0 }, |
| 107 | |
| 108 | }) |
| 109 | |
| 110 | #include "northbridge/intel/i440bx/acpi/sb_pci0_crs.asl" |
| 111 | #include "southbridge/intel/i82371eb/acpi/isabridge.asl" |
| 112 | } |
| 113 | #include "southbridge/intel/i82371eb/acpi/pirq.asl" |
| 114 | } |
| 115 | } |