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QingPei Wangcc66d972011-09-13 17:54:12 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
QingPei Wangcc66d972011-09-13 17:54:12 +080014 */
15
16#include <console/console.h>
17#include <arch/smp/mpspec.h>
18#include <device/pci.h>
19#include <arch/io.h>
20#include <string.h>
21#include <stdint.h>
22#include <cpu/amd/amdfam10_sysconf.h>
23#include <SBPLATFORM.h>
24
25extern int bus_isa;
26extern u8 bus_rs780[11];
Kyösti Mälkki9c7d73c2013-09-09 09:23:19 +030027extern u8 bus_sb800[6];
QingPei Wangcc66d972011-09-13 17:54:12 +080028extern u32 apicid_sb800;
QingPei Wangcc66d972011-09-13 17:54:12 +080029extern u32 sbdn_rs780;
30extern u32 sbdn_sb800;
31
32u8 intr_data[] = {
33 [0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, /* INTA# - INTH# */
34 [0x08] = 0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F, /* Misc-nil,0,1,2, INT from Serial irq */
35 [0x10] = 0x1F,0x1F,0x1F,0x10,0x1F,0x12,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
36 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
37 0x12,0x11,0x12,0x11,0x12,0x11,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
38 0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
39 0x10,0x11,0x12,0x13
40};
41
42static void *smp_write_config_table(void *v)
43{
44 struct mp_config_table *mc;
45 u32 dword;
46 u8 byte;
47
48 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
49
Patrick Georgic8feedd2012-02-16 18:43:25 +010050 mptable_init(mc, LOCAL_APIC_ADDR);
QingPei Wangcc66d972011-09-13 17:54:12 +080051
52 smp_write_processors(mc);
53
54 get_bus_conf();
55
56 mptable_write_buses(mc, NULL, &bus_isa);
57
58 /* I/O APICs: APIC ID Version State Address */
59 ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
60 dword &= 0xFFFFFFF0;
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080061 smp_write_ioapic(mc, apicid_sb800, 0x11,(void *) dword);
QingPei Wangcc66d972011-09-13 17:54:12 +080062
63 for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
64 outb(byte | 0x80, 0xC00);
65 outb(intr_data[byte], 0xC01);
66 }
67
68 /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
69#define IO_LOCAL_INT(type, intr, apicid, pin) \
70 smp_write_intsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));
71
72 mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0);
73
QingPei Wangcc66d972011-09-13 17:54:12 +080074 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
75 IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
76 IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);
77 /* There is no extension information... */
78
Patrick Georgi952b4212011-10-29 22:42:22 +020079 return mptable_finalize(mc);
QingPei Wangcc66d972011-09-13 17:54:12 +080080}
81
82unsigned long write_smp_table(unsigned long addr)
83{
84 void *v;
Patrick Georgi952b4212011-10-29 22:42:22 +020085 v = smp_write_floating_table(addr, 0);
QingPei Wangcc66d972011-09-13 17:54:12 +080086 return (unsigned long)smp_write_config_table(v);
87}