Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> |
| 5 | * Copyright (C) 2010 Tobias Diedrich <ranma+coreboot@tdiedrich.de> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <string.h> |
| 18 | #include <stdint.h> |
| 19 | #include <arch/smp/mpspec.h> |
| 20 | #include <arch/ioapic.h> |
| 21 | #include <device/pci.h> |
| 22 | #include <device/pci_ids.h> |
| 23 | #include "southbridge/via/vt8237r/vt8237r.h" |
| 24 | #include "southbridge/via/k8t890/k8t890.h" |
| 25 | |
| 26 | static void smp_write_intsrc_pci(struct mp_config_table *mc, |
| 27 | unsigned char srcbus, unsigned char srcbusirq, |
| 28 | unsigned char dstapic, unsigned char dstirq) |
| 29 | { |
| 30 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, |
| 31 | srcbus, srcbusirq, dstapic, dstirq); |
| 32 | } |
| 33 | |
| 34 | static void *smp_write_config_table(void *v) |
| 35 | { |
| 36 | struct mp_config_table *mc; |
Tobias Diedrich | 5f00e0c | 2010-11-10 22:09:42 +0000 | [diff] [blame] | 37 | int bus_isa; |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 38 | |
| 39 | mc = (void*)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
| 40 | |
Patrick Georgi | c8feedd | 2012-02-16 18:43:25 +0100 | [diff] [blame] | 41 | mptable_init(mc, LOCAL_APIC_ADDR); |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 42 | |
| 43 | smp_write_processors(mc); |
Tobias Diedrich | 5f00e0c | 2010-11-10 22:09:42 +0000 | [diff] [blame] | 44 | mptable_write_buses(mc, NULL, &bus_isa); |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 45 | |
| 46 | /* I/O APICs: APIC ID Version State Address */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 47 | smp_write_ioapic(mc, VT8237R_APIC_ID, 0x3, VIO_APIC_VADDR); |
| 48 | smp_write_ioapic(mc, K8T890_APIC_ID, 0x3, (void*)K8T890_APIC_BASE); |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 49 | |
| 50 | mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0); |
| 51 | |
| 52 | /* agp? bridge */ |
| 53 | smp_write_intsrc_pci(mc, 0, (0x1 << 2) | 0, VT8237R_APIC_ID, 0x10); |
| 54 | smp_write_intsrc_pci(mc, 0, (0x1 << 2) | 1, VT8237R_APIC_ID, 0x11); |
| 55 | smp_write_intsrc_pci(mc, 0, (0x1 << 2) | 2, VT8237R_APIC_ID, 0x12); |
| 56 | smp_write_intsrc_pci(mc, 0, (0x1 << 2) | 3, VT8237R_APIC_ID, 0x13); |
| 57 | |
| 58 | /* peg bridge */ |
| 59 | smp_write_intsrc_pci(mc, 0, (0x2 << 2) | 0, K8T890_APIC_ID, 0x3); |
| 60 | smp_write_intsrc_pci(mc, 0, (0x2 << 2) | 1, K8T890_APIC_ID, 0x3); |
| 61 | smp_write_intsrc_pci(mc, 0, (0x2 << 2) | 2, K8T890_APIC_ID, 0x3); |
| 62 | smp_write_intsrc_pci(mc, 0, (0x2 << 2) | 3, K8T890_APIC_ID, 0x3); |
| 63 | |
| 64 | /* pex bridge */ |
| 65 | smp_write_intsrc_pci(mc, 0, (0x3 << 2) | 0, K8T890_APIC_ID, 0x7); |
| 66 | smp_write_intsrc_pci(mc, 0, (0x3 << 2) | 1, K8T890_APIC_ID, 0xb); |
| 67 | smp_write_intsrc_pci(mc, 0, (0x3 << 2) | 2, K8T890_APIC_ID, 0xf); |
| 68 | smp_write_intsrc_pci(mc, 0, (0x3 << 2) | 3, K8T890_APIC_ID, 0x13); |
| 69 | |
| 70 | /* SATA / IDE */ |
| 71 | smp_write_intsrc_pci(mc, 0, (0xf << 2) | 0, VT8237R_APIC_ID, 0x15); |
| 72 | |
| 73 | /* USB */ |
| 74 | smp_write_intsrc_pci(mc, 0, (0x10 << 2) | 0, VT8237R_APIC_ID, 0x14); |
| 75 | smp_write_intsrc_pci(mc, 0, (0x10 << 2) | 1, VT8237R_APIC_ID, 0x16); |
| 76 | smp_write_intsrc_pci(mc, 0, (0x10 << 2) | 2, VT8237R_APIC_ID, 0x15); |
| 77 | smp_write_intsrc_pci(mc, 0, (0x10 << 2) | 3, VT8237R_APIC_ID, 0x17); |
| 78 | |
| 79 | /* PCIE graphics */ |
| 80 | smp_write_intsrc_pci(mc, 2, (0x00 << 2) | 0, K8T890_APIC_ID, 0x0); |
| 81 | smp_write_intsrc_pci(mc, 2, (0x00 << 2) | 1, K8T890_APIC_ID, 0x1); |
| 82 | smp_write_intsrc_pci(mc, 2, (0x00 << 2) | 2, K8T890_APIC_ID, 0x2); |
| 83 | smp_write_intsrc_pci(mc, 2, (0x00 << 2) | 3, K8T890_APIC_ID, 0x3); |
| 84 | |
| 85 | /* onboard PCIE atl1 ethernet */ |
| 86 | smp_write_intsrc_pci(mc, 3, (0x00 << 2) | 0, K8T890_APIC_ID, 0x4); |
| 87 | smp_write_intsrc_pci(mc, 3, (0x00 << 2) | 1, K8T890_APIC_ID, 0x5); |
| 88 | smp_write_intsrc_pci(mc, 3, (0x00 << 2) | 2, K8T890_APIC_ID, 0x6); |
| 89 | smp_write_intsrc_pci(mc, 3, (0x00 << 2) | 3, K8T890_APIC_ID, 0x7); |
| 90 | |
| 91 | /* PCIE slot */ |
| 92 | smp_write_intsrc_pci(mc, 4, (0x00 << 2) | 0, K8T890_APIC_ID, 0x8); |
| 93 | smp_write_intsrc_pci(mc, 4, (0x00 << 2) | 1, K8T890_APIC_ID, 0x9); |
| 94 | smp_write_intsrc_pci(mc, 4, (0x00 << 2) | 2, K8T890_APIC_ID, 0xa); |
| 95 | smp_write_intsrc_pci(mc, 4, (0x00 << 2) | 3, K8T890_APIC_ID, 0xb); |
| 96 | |
| 97 | /* onboard marvell mv6121 sata */ |
| 98 | smp_write_intsrc_pci(mc, 5, (0x00 << 2) | 0, K8T890_APIC_ID, 0xc); |
| 99 | smp_write_intsrc_pci(mc, 5, (0x00 << 2) | 1, K8T890_APIC_ID, 0xd); |
| 100 | smp_write_intsrc_pci(mc, 5, (0x00 << 2) | 2, K8T890_APIC_ID, 0xe); |
| 101 | smp_write_intsrc_pci(mc, 5, (0x00 << 2) | 3, K8T890_APIC_ID, 0xf); |
| 102 | |
| 103 | /* azalia HDCA */ |
| 104 | smp_write_intsrc_pci(mc, 6, (0x01 << 2) | 0, VT8237R_APIC_ID, 0x11); |
| 105 | |
| 106 | /* pci slot 1 */ |
| 107 | smp_write_intsrc_pci(mc, 7, (6 << 2) | 0, VT8237R_APIC_ID, 0x10); |
| 108 | smp_write_intsrc_pci(mc, 7, (6 << 2) | 1, VT8237R_APIC_ID, 0x11); |
| 109 | smp_write_intsrc_pci(mc, 7, (6 << 2) | 2, VT8237R_APIC_ID, 0x12); |
| 110 | smp_write_intsrc_pci(mc, 7, (6 << 2) | 3, VT8237R_APIC_ID, 0x13); |
| 111 | |
| 112 | /* pci slot 2 */ |
| 113 | smp_write_intsrc_pci(mc, 7, (7 << 2) | 0, VT8237R_APIC_ID, 0x11); |
| 114 | smp_write_intsrc_pci(mc, 7, (7 << 2) | 1, VT8237R_APIC_ID, 0x12); |
| 115 | smp_write_intsrc_pci(mc, 7, (7 << 2) | 2, VT8237R_APIC_ID, 0x13); |
| 116 | smp_write_intsrc_pci(mc, 7, (7 << 2) | 3, VT8237R_APIC_ID, 0x10); |
| 117 | |
| 118 | /* pci slot 3 */ |
| 119 | smp_write_intsrc_pci(mc, 7, (8 << 2) | 0, VT8237R_APIC_ID, 0x12); |
| 120 | smp_write_intsrc_pci(mc, 7, (8 << 2) | 1, VT8237R_APIC_ID, 0x13); |
| 121 | smp_write_intsrc_pci(mc, 7, (8 << 2) | 2, VT8237R_APIC_ID, 0x10); |
| 122 | smp_write_intsrc_pci(mc, 7, (8 << 2) | 3, VT8237R_APIC_ID, 0x11); |
| 123 | |
| 124 | /* pci slot 4 */ |
| 125 | smp_write_intsrc_pci(mc, 7, (9 << 2) | 0, VT8237R_APIC_ID, 0x13); |
| 126 | smp_write_intsrc_pci(mc, 7, (9 << 2) | 1, VT8237R_APIC_ID, 0x10); |
| 127 | smp_write_intsrc_pci(mc, 7, (9 << 2) | 2, VT8237R_APIC_ID, 0x11); |
| 128 | smp_write_intsrc_pci(mc, 7, (9 << 2) | 3, VT8237R_APIC_ID, 0x12); |
| 129 | |
| 130 | /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ |
Patrick Georgi | 6eb7a53 | 2011-10-07 21:42:52 +0200 | [diff] [blame] | 131 | mptable_lintsrc(mc, 0); |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 132 | /* There is no extension information... */ |
| 133 | |
| 134 | /* Compute the checksums. */ |
Patrick Georgi | b0a9c5c | 2011-10-07 23:01:55 +0200 | [diff] [blame] | 135 | return mptable_finalize(mc); |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | unsigned long write_smp_table(unsigned long addr) |
| 139 | { |
| 140 | void *v; |
Patrick Georgi | c75c79b | 2011-10-07 22:41:07 +0200 | [diff] [blame] | 141 | v = smp_write_floating_table(addr, 0); |
Tobias Diedrich | ca03331 | 2010-11-10 19:08:52 +0000 | [diff] [blame] | 142 | return (unsigned long)smp_write_config_table(v); |
| 143 | } |