| Timothy Pearson | ab95702 | 2015-10-28 02:59:40 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering |
| 5 | * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| Timothy Pearson | ab95702 | 2015-10-28 02:59:40 -0500 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <pc80/mc146818rtc.h> |
| 19 | |
| 20 | #include <superio/winbond/common/winbond.h> |
| 21 | #include <superio/winbond/w83627thg/w83627thg.h> |
| 22 | |
| 23 | #define GPIO_DEV PNP_DEV(0x2e, W83627THG_GPIO3) |
| 24 | |
| 25 | #define WINBOND_ENTRY_KEY 0x87 |
| 26 | #define WINBOND_EXIT_KEY 0xAA |
| 27 | |
| 28 | /* Enable configuration: pass entry key '0x87' into index port dev. */ |
| 29 | static void pnp_enter_conf_state(pnp_devfn_t dev) |
| 30 | { |
| 31 | u16 port = dev >> 8; |
| 32 | outb(WINBOND_ENTRY_KEY, port); |
| 33 | outb(WINBOND_ENTRY_KEY, port); |
| 34 | } |
| 35 | |
| 36 | /* Disable configuration: pass exit key '0xAA' into index port dev. */ |
| 37 | static void pnp_exit_conf_state(pnp_devfn_t dev) |
| 38 | { |
| 39 | u16 port = dev >> 8; |
| 40 | outb(WINBOND_EXIT_KEY, port); |
| 41 | } |
| 42 | |
| 43 | uint8_t bootblock_read_recovery_jumper(pnp_devfn_t dev) |
| 44 | { |
| 45 | uint8_t recovery_enabled = 0; |
| 46 | |
| 47 | pnp_enter_conf_state(dev); |
| 48 | pnp_set_logical_device(dev); |
| 49 | pnp_set_enable(dev, 1); /* Enable GPIO3 */ |
| 50 | pnp_write_config(dev, 0xf0, 0xff); /* Set GPIO3 to input */ |
| 51 | recovery_enabled = !(pnp_read_config(dev, 0xf1) & 0x08); /* Read GP33 */ |
| 52 | pnp_exit_conf_state(dev); |
| 53 | |
| 54 | return recovery_enabled; |
| 55 | } |
| 56 | |
| 57 | void bootblock_mainboard_init(void) |
| 58 | { |
| 59 | uint8_t recovery_enabled; |
| 60 | unsigned char addr; |
| 61 | unsigned char byte; |
| 62 | |
| 63 | recovery_enabled = bootblock_read_recovery_jumper(GPIO_DEV); |
| 64 | if (recovery_enabled) { |
| 65 | #if CONFIG_USE_OPTION_TABLE |
| 66 | /* Clear NVRAM checksum */ |
| 67 | for (addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) { |
| 68 | cmos_write(0x0, addr); |
| 69 | } |
| 70 | |
| 71 | /* Set fallback boot */ |
| 72 | byte = cmos_read(RTC_BOOT_BYTE); |
| 73 | byte &= 0xfc; |
| 74 | cmos_write(byte, RTC_BOOT_BYTE); |
| 75 | #else |
| 76 | /* FIXME |
| 77 | * Figure out how to recover if the option table is not available |
| 78 | */ |
| 79 | #endif |
| 80 | } |
| 81 | } |