Timothy Pearson | 8057285 | 2015-01-23 20:35:48 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering |
| 5 | * Copyright (C) 2007 AMD |
| 6 | * (Written by Yinghai Lu <yinghailu@amd.com> for AMD) |
| 7 | * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de> |
| 8 | * (Thanks to LSRA University of Mannheim for their support) |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
Timothy Pearson | 8057285 | 2015-01-23 20:35:48 -0600 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | // WARNING |
| 22 | // These tables are INCOMPLETE for this mainboard! |
| 23 | // The ACPI tables are correct; a backport to these MP tables is needed... |
| 24 | |
| 25 | #include <console/console.h> |
| 26 | #include <arch/smp/mpspec.h> |
| 27 | #include <device/pci.h> |
| 28 | #include <string.h> |
| 29 | #include <stdint.h> |
| 30 | #include <cpu/amd/amdfam10_sysconf.h> |
| 31 | |
| 32 | extern unsigned char bus_ck804[6]; |
| 33 | extern unsigned apicid_ck804; |
| 34 | |
| 35 | static void *smp_write_config_table(void *v) |
| 36 | { |
| 37 | struct mp_config_table *mc; |
| 38 | unsigned sbdn; |
| 39 | int bus_isa; |
| 40 | |
| 41 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
| 42 | |
| 43 | mptable_init(mc, LOCAL_APIC_ADDR); |
| 44 | |
| 45 | smp_write_processors(mc); |
| 46 | |
| 47 | get_bus_conf(); |
| 48 | sbdn = sysconf.sbdn; |
| 49 | |
| 50 | mptable_write_buses(mc, NULL, &bus_isa); |
| 51 | |
| 52 | /* I/O APICs: APIC ID Version State Address */ |
| 53 | { |
| 54 | device_t dev; |
| 55 | struct resource *res; |
| 56 | |
| 57 | dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + 0x1, 0)); |
| 58 | if (dev) { |
| 59 | res = find_resource(dev, PCI_BASE_ADDRESS_1); |
| 60 | if (res) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 61 | smp_write_ioapic(mc, apicid_ck804, 0x11, |
| 62 | res2mmio(res, 0, 0)); |
Timothy Pearson | 8057285 | 2015-01-23 20:35:48 -0600 | [diff] [blame] | 63 | } |
| 64 | |
| 65 | /* Initialize interrupt mapping. */ |
| 66 | |
| 67 | /* |
| 68 | LPC bridge PCI config registers: |
| 69 | |
| 70 | 0x7c:0x0000ffff |
| 71 | - bitmap of masked pci irqs? |
| 72 | - PIRQ[ABCD] possibly? |
| 73 | |
| 74 | 0x7c:0x00f00000 |
| 75 | - sata at f8 - port 1 |
| 76 | |
| 77 | 0x7c:0x0f000000 |
| 78 | - sata at f7 - port 1 |
| 79 | |
| 80 | 0x80:0xf0000000 |
| 81 | - sata at f7 - port 0 |
| 82 | |
| 83 | 0x80:0x0f000000 |
| 84 | - sata at f8 - port 0 |
| 85 | |
| 86 | 0x80:0x0000f000 |
| 87 | - EHCI |
| 88 | |
| 89 | 0x84:0x00000f00 |
| 90 | - NIC |
| 91 | |
| 92 | 0x84:0x0000000f |
| 93 | - OHCI |
| 94 | |
| 95 | known values of nibbles: |
| 96 | |
| 97 | 0 - unrouted? |
| 98 | 1 - irq 23 |
| 99 | 8 - irq 20 |
| 100 | c - irq 12 |
| 101 | d - irq 21 |
| 102 | e - irq 14 |
| 103 | f - irq 15 |
| 104 | */ |
| 105 | |
| 106 | // Enable interrupts for commonly used devices (USB, SATA, etc.) |
| 107 | pci_write_config32(dev, 0x7c, 0x0d800018); |
| 108 | pci_write_config32(dev, 0x80, 0xd8002009); |
| 109 | pci_write_config32(dev, 0x84, 0x00000001); |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | mptable_add_isa_interrupts(mc, bus_isa, apicid_ck804, 0); |
| 114 | |
| 115 | // Onboard ck804 smbus |
| 116 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, |
| 117 | bus_ck804[0], ((sbdn + 1) << 2) | 1, apicid_ck804, |
| 118 | 0xa); |
| 119 | |
| 120 | // Onboard ck804 USB 1.1 |
| 121 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, |
| 122 | bus_ck804[0], ((sbdn + 2) << 2) | 0, apicid_ck804, |
| 123 | 0x15); |
| 124 | |
| 125 | // Onboard ck804 USB 2 |
| 126 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, |
| 127 | bus_ck804[0], ((sbdn + 2) << 2) | 1, apicid_ck804, |
| 128 | 0x14); |
| 129 | |
| 130 | // Onboard ck804 SATA 0 |
| 131 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, |
| 132 | bus_ck804[0], ((sbdn + 7) << 2) | 0, apicid_ck804, |
| 133 | 0x17); |
| 134 | |
| 135 | // Onboard ck804 SATA 1 |
| 136 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, |
| 137 | bus_ck804[0], ((sbdn + 8) << 2) | 0, apicid_ck804, |
| 138 | 0x16); |
| 139 | |
| 140 | /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ |
| 141 | mptable_lintsrc(mc, bus_ck804[0]); |
| 142 | |
| 143 | /* There is no extension information... */ |
| 144 | |
| 145 | /* Compute the checksums. */ |
| 146 | return mptable_finalize(mc); |
| 147 | } |
| 148 | |
| 149 | unsigned long write_smp_table(unsigned long addr) |
| 150 | { |
| 151 | void *v = smp_write_floating_table(addr, 0); |
| 152 | return (unsigned long)smp_write_config_table(v); |
| 153 | } |