Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
| 4 | # Copyright (C) 2012 Advanced Micro Devices, Inc. |
| 5 | # |
| 6 | # This program is free software; you can redistribute it and/or modify |
| 7 | # it under the terms of the GNU General Public License as published by |
| 8 | # the Free Software Foundation; version 2 of the License. |
| 9 | # |
| 10 | # This program is distributed in the hope that it will be useful, |
| 11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | # GNU General Public License for more details. |
| 14 | # |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 15 | chip northbridge/amd/agesa/family15tn/root_complex |
| 16 | |
| 17 | device cpu_cluster 0 on |
| 18 | chip cpu/amd/agesa/family15tn |
| 19 | device lapic 10 on end |
| 20 | end |
| 21 | end |
| 22 | |
| 23 | device domain 0 on |
| 24 | subsystemid 0x1022 0x1410 inherit |
| 25 | chip northbridge/amd/agesa/family15tn # CPU side of HT root complex |
| 26 | |
| 27 | chip northbridge/amd/agesa/family15tn # PCI side of HT root complex |
| 28 | device pci 0.0 on end # Root Complex |
Rudolf Marek | a00e6159 | 2013-05-27 16:12:00 +0200 | [diff] [blame] | 29 | device pci 0.2 on end # IOMMU |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 30 | device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX |
| 31 | device pci 1.1 on end # Internal Multimedia |
Tobias Diedrich | 1e7408c | 2014-11-09 20:14:01 +0100 | [diff] [blame] | 32 | device pci 2.0 on end # PCIE SLOT0 x16 blue |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 33 | device pci 3.0 off end # unused? |
| 34 | device pci 4.0 on end # PCIE 4x black |
| 35 | device pci 5.0 off end # unused? |
| 36 | device pci 6.0 off end # unused? |
| 37 | device pci 7.0 off end # LAN |
| 38 | device pci 8.0 off end # NB/SB Link P2P bridge |
| 39 | end #chip northbridge/amd/agesa/family15tn # PCI side of HT root complex |
| 40 | |
| 41 | chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus |
| 42 | device pci 10.0 on end # XHCI HC0 |
| 43 | device pci 10.1 on end # XHCI HC1 |
| 44 | device pci 11.0 on end # SATA |
| 45 | device pci 12.0 on end # USB |
| 46 | device pci 12.2 on end # USB |
| 47 | device pci 13.0 on end # USB |
| 48 | device pci 13.2 on end # USB |
| 49 | device pci 14.0 on # SMBUS |
| 50 | chip drivers/generic/generic #dimm 0 |
| 51 | device i2c 50 on end # 7-bit SPD address |
| 52 | end |
| 53 | chip drivers/generic/generic #dimm 1 |
| 54 | device i2c 51 on end # 7-bit SPD address |
| 55 | end |
| 56 | end # SM |
| 57 | device pci 14.1 off end # IDE 0x439c |
| 58 | device pci 14.2 on end # HDA 0x4383 |
| 59 | device pci 14.3 on # LPC 0x439d |
Rudolf Marek | 80b627e | 2014-05-13 16:36:56 +0200 | [diff] [blame] | 60 | chip superio/ite/it8728f |
| 61 | register hwm_ctl_register = "0xc0" |
| 62 | register hwm_main_ctl_register = "0x33" |
| 63 | register hwm_adc_temp_chan_en_reg = "0x38" |
| 64 | register hwm_fan1_ctl_pwm = "0x00" |
Rudolf Marek | d13059a | 2014-07-07 22:40:12 +0200 | [diff] [blame] | 65 | register hwm_fan2_ctl_pwm = "0x00" |
Rudolf Marek | 80b627e | 2014-05-13 16:36:56 +0200 | [diff] [blame] | 66 | register hwm_fan3_ctl_pwm = "0x00" |
| 67 | |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 68 | device pnp 2e.0 off # Floppy |
| 69 | io 0x60 = 0x3f0 |
| 70 | irq 0x70 = 6 |
| 71 | drq 0x74 = 2 |
| 72 | end |
| 73 | device pnp 2e.1 on # Com1 |
| 74 | io 0x60 = 0x3f8 |
| 75 | irq 0x70 = 4 |
| 76 | end |
| 77 | device pnp 2e.2 off # Com2 |
| 78 | io 0x60 = 0x2f8 |
| 79 | irq 0x70 = 3 |
| 80 | end |
| 81 | device pnp 2e.3 off # Parallel Port |
| 82 | io 0x60 = 0x378 |
| 83 | irq 0x70 = 7 |
| 84 | end |
Rudolf Marek | 80b627e | 2014-05-13 16:36:56 +0200 | [diff] [blame] | 85 | device pnp 2e.4 on # Env Controller |
| 86 | io 0x60 = 0x290 |
| 87 | io 0x62 = 0x220 |
| 88 | irq 0x70 = 0 |
| 89 | end |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 90 | device pnp 2e.5 on # Keyboard |
| 91 | io 0x60 = 0x60 |
| 92 | io 0x62 = 0x64 |
| 93 | irq 0x70 = 1 |
| 94 | end |
| 95 | device pnp 2e.6 off # Mouse |
| 96 | irq 0x70 = 12 |
| 97 | end |
Rudolf Marek | 80b627e | 2014-05-13 16:36:56 +0200 | [diff] [blame] | 98 | device pnp 2e.7 on # GPIO |
| 99 | io 0x60 = 0x228 #SMI |
| 100 | io 0x62 = 0x300 #Simple I/O |
| 101 | io 0x64 = 0x238 #Phony resource IT8603E does not have it |
| 102 | irq 0x70 = 0 |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 103 | end |
| 104 | device pnp 2e.a off end # CIR |
Rudolf Marek | 80b627e | 2014-05-13 16:36:56 +0200 | [diff] [blame] | 105 | end #superio/ite/it8728f |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 106 | end #device pci 14.3 # LPC |
Rudolf Marek | 80b627e | 2014-05-13 16:36:56 +0200 | [diff] [blame] | 107 | device pci 14.4 on end # PCI 0x4384 |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 108 | device pci 14.5 on end # USB 2 |
| 109 | device pci 14.6 off end # Gec |
Tobias Diedrich | 93e8161 | 2014-11-09 20:16:04 +0100 | [diff] [blame] | 110 | device pci 14.7 off end # SD |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 111 | device pci 15.0 on end # PCIe 0 - onboard PCIe 1x |
| 112 | device pci 15.1 on end # PCIe 1 onboard gigabit |
| 113 | device pci 15.2 off end # unused |
| 114 | device pci 15.3 off end # unused |
| 115 | |
Rudolf Marek | c8eab2c | 2013-03-20 21:43:50 +0100 | [diff] [blame] | 116 | end #chip southbridge/amd/hudson |
| 117 | |
| 118 | device pci 18.0 on end |
| 119 | device pci 18.1 on end |
| 120 | device pci 18.2 on end |
| 121 | device pci 18.3 on end |
| 122 | device pci 18.4 on end |
| 123 | device pci 18.5 on end |
| 124 | |
| 125 | register "spdAddrLookup" = " |
| 126 | { |
| 127 | { {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses |
| 128 | { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses |
| 129 | }" |
| 130 | |
| 131 | end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex |
| 132 | end #domain |
| 133 | end #chip northbridge/amd/agesa/family15tn/root_complex |