blob: eddcf29fbaaf24254b4a6b782f52d1b0d4cad029 [file] [log] [blame]
Kerry Shehb9136ed82011-11-15 21:27:57 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kerry Shehb9136ed82011-11-15 21:27:57 +080014 */
15
16#include <lib.h>
17#include <stdint.h>
18#include <string.h>
19#include <device/pci_def.h>
20#include <device/pci_ids.h>
21#include <arch/io.h>
22#include <arch/stages.h>
23#include <device/pnp_def.h>
Kerry Shehb9136ed82011-11-15 21:27:57 +080024#include <arch/cpu.h>
25#include <cpu/x86/lapic.h>
26#include <console/console.h>
Aaron Durbindc9f5cd2015-09-08 13:34:43 -050027#include <commonlib/loglevel.h>
Kyösti Mälkki107f72e2014-01-06 11:06:26 +020028#include <cpu/x86/mtrr.h>
Edward O'Callaghanbf9d1222014-10-29 09:26:00 +110029#include <cpu/amd/car.h>
Kyösti Mälkkif21c2ac2014-10-19 09:35:18 +030030#include <northbridge/amd/agesa/agesawrapper.h>
Edward O'Callaghan77757c22015-01-04 21:33:39 +110031#include <cpu/x86/bist.h>
32#include <cpu/x86/lapic.h>
Paul Menzel69743962013-04-19 10:05:57 +020033#include <sb_cimx.h>
Kerry Shehb9136ed82011-11-15 21:27:57 +080034#include "SBPLATFORM.h"
35
36#define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
37
38void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
39{
40 u32 val;
41
Marc Jones938ae3e2012-01-17 16:51:24 -070042 /*
43 * All cores: allow caching of flash chip code and data
44 * (there are no cache-as-ram reliability concerns with family 14h)
45 */
Kyösti Mälkki107f72e2014-01-06 11:06:26 +020046 __writemsr (0x20c, (0x0100000000ull - CACHE_ROM_SIZE) | 5);
47 __writemsr (0x20d, (0x1000000000ull - CACHE_ROM_SIZE) | 0x800);
Kerry Shehb9136ed82011-11-15 21:27:57 +080048
Kyösti Mälkki48518f02014-11-25 14:20:57 +020049 amd_initmmio();
Kyösti Mälkkie453b9a2014-11-25 14:03:29 +020050
Kerry Shehb9136ed82011-11-15 21:27:57 +080051 if (!cpu_init_detectedx && boot_cpu()) {
52 post_code(0x30);
53 sb_Poweron_Init();
54
55 post_code(0x31);
Kerry Shehb9136ed82011-11-15 21:27:57 +080056 console_init();
57 }
58
59 /* Halt if there was a built in self test failure */
60 post_code(0x34);
61 report_bist_failure(bist);
62
Marc Jones938ae3e2012-01-17 16:51:24 -070063 /* Load MPB */
Kerry Shehb9136ed82011-11-15 21:27:57 +080064 val = cpuid_eax(1);
Elyes HAOUASaedcc102014-07-21 08:07:19 +020065 printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
66 printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
Kerry Shehb9136ed82011-11-15 21:27:57 +080067
Kerry Shehb9136ed82011-11-15 21:27:57 +080068 post_code(0x37);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030069 agesawrapper_amdinitreset();
Kerry Shehb9136ed82011-11-15 21:27:57 +080070
71 post_code(0x39);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030072 agesawrapper_amdinitearly();
Kerry Shehb9136ed82011-11-15 21:27:57 +080073
74 post_code(0x40);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030075 agesawrapper_amdinitpost();
Kerry Shehb9136ed82011-11-15 21:27:57 +080076
77 post_code(0x41);
Kyösti Mälkki1aa35c62014-10-21 14:19:04 +030078 agesawrapper_amdinitenv();
Kyösti Mälkki4a08e152014-12-14 19:41:54 +020079 amd_initenv();
Kerry Shehb9136ed82011-11-15 21:27:57 +080080
81 post_code(0x50);
Stefan Reinauer648d1662013-05-06 18:05:39 -070082 copy_and_run();
Marc Jones938ae3e2012-01-17 16:51:24 -070083 printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
Kerry Shehb9136ed82011-11-15 21:27:57 +080084
Marc Jones938ae3e2012-01-17 16:51:24 -070085 post_code(0x54); /* Should never see this post code. */
Kerry Shehb9136ed82011-11-15 21:27:57 +080086}