Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <arch/io.h> |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 20 | #include <cpu/x86/msr.h> |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 21 | #include <device/pci_def.h> |
Kimarie Hoot | 9ca4f51 | 2013-03-07 09:10:29 -0700 | [diff] [blame] | 22 | #include <southbridge/amd/sb800/sb800.h> |
| 23 | #include <cpu/amd/mtrr.h> |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 24 | #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 25 | |
| 26 | void set_pcie_reset(void); |
| 27 | void set_pcie_dereset(void); |
| 28 | |
| 29 | /** |
| 30 | * TODO |
| 31 | * SB CIMx callback |
| 32 | */ |
| 33 | void set_pcie_reset(void) |
| 34 | { |
| 35 | } |
| 36 | |
| 37 | /** |
| 38 | * TODO |
| 39 | * mainboard specific SB CIMx callback |
| 40 | */ |
| 41 | void set_pcie_dereset(void) |
| 42 | { |
| 43 | } |
| 44 | |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 45 | |
Jens Rottmann | 5e70766 | 2013-02-26 15:56:11 +0100 | [diff] [blame] | 46 | /********************************************** |
| 47 | * Enable the dedicated functions of the board. |
| 48 | **********************************************/ |
Paul Menzel | 528640d | 2013-02-23 21:31:23 +0100 | [diff] [blame] | 49 | static void mainboard_enable(device_t dev) |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 50 | { |
| 51 | printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); |
Kimarie Hoot | 9ca4f51 | 2013-03-07 09:10:29 -0700 | [diff] [blame] | 52 | |
| 53 | /* |
| 54 | * Initialize ASF registers to an arbitrary address because someone |
| 55 | * long ago set things up this way inside the SPD read code. The |
| 56 | * SPD read code has been made generic and moved out of the board |
| 57 | * directory, so the ASF init is being done here. |
| 58 | */ |
| 59 | pm_iowrite(0x29, 0x80); |
| 60 | pm_iowrite(0x28, 0x61); |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 61 | } |
| 62 | |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 63 | struct chip_operations mainboard_ops = { |
Paul Menzel | 528640d | 2013-02-23 21:31:23 +0100 | [diff] [blame] | 64 | .enable_dev = mainboard_enable, |
Kerry Sheh | b9136ed8 | 2011-11-15 21:27:57 +0800 | [diff] [blame] | 65 | }; |