Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <arch/smp/mpspec.h> |
Uwe Hermann | 74d1a6e | 2010-10-12 17:34:08 +0000 | [diff] [blame] | 18 | #include <arch/ioapic.h> |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 19 | #include <device/pci.h> |
| 20 | #include <string.h> |
| 21 | #include <stdint.h> |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 22 | #if CONFIG_LOGICAL_CPUS |
Stefan Reinauer | 9a16e3e | 2010-03-29 14:45:36 +0000 | [diff] [blame] | 23 | #include <cpu/amd/multicore.h> |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 24 | #endif |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 25 | #include <cpu/amd/amdfam10_sysconf.h> |
| 26 | #include "mb_sysconf.h" |
| 27 | |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 28 | static void *smp_write_config_table(void *v) |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 29 | { |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 30 | int i, j, bus_isa; |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 31 | struct mp_config_table *mc; |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 32 | struct mb_sysconf_t *m; |
| 33 | |
| 34 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 35 | |
Patrick Georgi | c8feedd | 2012-02-16 18:43:25 +0100 | [diff] [blame] | 36 | mptable_init(mc, LOCAL_APIC_ADDR); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 37 | |
| 38 | smp_write_processors(mc); |
| 39 | |
| 40 | get_bus_conf(); |
| 41 | |
| 42 | m = sysconf.mb; |
| 43 | |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 44 | mptable_write_buses(mc, NULL, &bus_isa); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 45 | |
| 46 | /*I/O APICs: APIC ID Version State Address*/ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 47 | smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111 |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 48 | { |
| 49 | device_t dev; |
| 50 | struct resource *res; |
| 51 | dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 1)); |
| 52 | if (dev) { |
| 53 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 54 | if (res) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 55 | smp_write_ioapic(mc, m->apicid_8132_1, 0x11, |
| 56 | res2mmio(res, 0, 0)); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 57 | } |
| 58 | } |
| 59 | dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1)); |
| 60 | if (dev) { |
| 61 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 62 | if (res) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 63 | smp_write_ioapic(mc, m->apicid_8132_2, 0x11, |
| 64 | res2mmio(res, 0, 0)); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 65 | } |
| 66 | } |
| 67 | |
| 68 | j = 0; |
| 69 | |
| 70 | for(i=1; i< sysconf.hc_possible_num; i++) { |
| 71 | if(!(sysconf.pci1234[i] & 0x1) ) continue; |
| 72 | |
| 73 | switch(sysconf.hcid[i]) { |
| 74 | case 1: |
| 75 | case 3: |
| 76 | dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); |
| 77 | if (dev) { |
| 78 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 79 | if (res) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 80 | smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, |
| 81 | res2mmio(res, 0, 0)); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 82 | } |
| 83 | } |
| 84 | dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); |
| 85 | if (dev) { |
| 86 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 87 | if (res) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 88 | smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, |
| 89 | res2mmio(res, 0, 0)); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 90 | } |
| 91 | } |
| 92 | break; |
| 93 | } |
| 94 | j++; |
| 95 | } |
| 96 | |
| 97 | } |
| 98 | |
Patrick Georgi | 7411eab | 2010-11-22 14:14:56 +0000 | [diff] [blame] | 99 | mptable_add_isa_interrupts(mc, bus_isa, m->apicid_8111, 0); |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 100 | |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 101 | /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 102 | //??? What |
| 103 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13); |
| 104 | |
| 105 | // Onboard AMD USB |
| 106 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0<<2)|3, m->apicid_8111, 0x13); |
| 107 | |
| 108 | //Slot 3 PCI 32 |
| 109 | for(i=0;i<4;i++) { |
| 110 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5<<2)|i, m->apicid_8111, 0x10 + (1+i)%4); //16 |
| 111 | } |
| 112 | |
| 113 | |
| 114 | // Slot 4 PCI 32 |
| 115 | for(i=0;i<4;i++) { |
| 116 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (4<<2)|i, m->apicid_8111, 0x10 + (0+i)%4); //16 |
| 117 | } |
| 118 | |
| 119 | |
| 120 | // Slot 1 PCI-X 133/100/66 |
| 121 | for(i=0;i<4;i++) { |
| 122 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, (1<<2)|i, m->apicid_8132_2, (0+i)%4); // |
| 123 | } |
| 124 | |
| 125 | |
| 126 | //Slot 2 PCI-X 133/100/66 |
| 127 | for(i=0;i<4;i++) { |
| 128 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1<<2)|i, m->apicid_8132_1, (1+i)%4); //25 |
| 129 | } |
| 130 | |
| 131 | j = 0; |
| 132 | |
| 133 | for(i=1; i< sysconf.hc_possible_num; i++) { |
| 134 | if(!(sysconf.pci1234[i] & 0x1) ) continue; |
| 135 | int ii; |
| 136 | int jj; |
| 137 | device_t dev; |
| 138 | struct resource *res; |
| 139 | switch(sysconf.hcid[i]) { |
| 140 | case 1: |
| 141 | case 3: |
| 142 | dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); |
| 143 | if (dev) { |
| 144 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 145 | if (res) { |
| 146 | for(jj=0; jj<4; jj++) { |
| 147 | //Slot 1 PCI-X 133/100/66 |
| 148 | for(ii=0;ii<4;ii++) { |
| 149 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (jj<<2)|ii, m->apicid_8132a[j][0], (jj+ii)%4); // |
| 150 | } |
| 151 | } |
| 152 | } |
| 153 | } |
| 154 | |
| 155 | dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); |
| 156 | if (dev) { |
| 157 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 158 | if (res) { |
| 159 | for(jj=0; jj<4; jj++) { |
| 160 | //Slot 2 PCI-X 133/100/66 |
| 161 | for(ii=0;ii<4;ii++) { |
| 162 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (jj<<2)|ii, m->apicid_8132a[j][1], (jj+ii)%4); //25 |
| 163 | } |
| 164 | } |
| 165 | } |
| 166 | } |
| 167 | |
| 168 | break; |
| 169 | case 2: |
| 170 | |
| 171 | // Slot AGP |
| 172 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151[j][1], 0x0, m->apicid_8111, 0x11); |
| 173 | break; |
| 174 | } |
| 175 | |
| 176 | j++; |
| 177 | } |
| 178 | |
| 179 | |
| 180 | |
| 181 | /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |
Patrick Georgi | 6eb7a53 | 2011-10-07 21:42:52 +0200 | [diff] [blame] | 182 | mptable_lintsrc(mc, bus_isa); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 183 | /* There is no extension information... */ |
| 184 | |
| 185 | /* Compute the checksums */ |
Patrick Georgi | b0a9c5c | 2011-10-07 23:01:55 +0200 | [diff] [blame] | 186 | return mptable_finalize(mc); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 187 | } |
| 188 | |
| 189 | unsigned long write_smp_table(unsigned long addr) |
| 190 | { |
| 191 | void *v; |
Patrick Georgi | c75c79b | 2011-10-07 22:41:07 +0200 | [diff] [blame] | 192 | v = smp_write_floating_table(addr, 0); |
Marc Jones | 2ce8bfd | 2007-12-19 01:49:44 +0000 | [diff] [blame] | 193 | return (unsigned long)smp_write_config_table(v); |
| 194 | } |