Carl-Daniel Hailfinger | a4d4770 | 2009-09-22 10:03:15 +0000 | [diff] [blame] | 1 | #Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default) |
Carl-Daniel Hailfinger | a4d4770 | 2009-09-22 10:03:15 +0000 | [diff] [blame] | 2 | #Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7) |
| 3 | #Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3, |
| 4 | # 1: the system allows a PCIE link to be established on Dev2 or Dev3. |
| 5 | #Define gfx_dual_slot, 0: single slot, 1: dual slot |
| 6 | #Define gfx_lane_reversal, 0: disable lane reversal, 1: enable |
| 7 | #Define gfx_tmds, 0: didn't support TMDS, 1: support |
| 8 | #Define gfx_compliance, 0: didn't support compliance, 1: support |
| 9 | #Define gfx_reconfiguration, 0: short reconfiguration, 1(default): long reconfiguration |
| 10 | #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16 |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 11 | chip northbridge/amd/amdk8/root_complex |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 12 | device cpu_cluster 0 on |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 13 | chip cpu/amd/socket_AM2 |
Patrick Georgi | 8d31368 | 2010-05-05 13:12:42 +0000 | [diff] [blame] | 14 | device lapic 0 on end |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 15 | end |
| 16 | end |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 17 | device domain 0 on |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 18 | subsystemid 0x1022 0x3050 inherit |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 19 | chip northbridge/amd/amdk8 |
| 20 | device pci 18.0 on # southbridge, K8 HT Configuration |
| 21 | chip southbridge/amd/rs690 |
| 22 | device pci 0.0 on end # HT 0x7910 |
| 23 | # device pci 0.1 off end # CLK |
| 24 | device pci 1.0 on # Internal Graphics P2P bridge 0x7912 |
Myles Watson | d27c08c | 2009-11-06 23:42:26 +0000 | [diff] [blame] | 25 | device pci 5.0 on end # Internal Graphics 0x791F |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 26 | end |
| 27 | device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 |
| 28 | device pci 3.0 off end # PCIE P2P bridge 0x791b |
| 29 | device pci 4.0 on end # PCIE P2P bridge 0x7914 |
| 30 | device pci 5.0 on end # PCIE P2P bridge 0x7915 |
| 31 | device pci 6.0 on end # PCIE P2P bridge 0x7916 |
| 32 | device pci 7.0 on end # PCIE P2P bridge 0x7917 |
| 33 | device pci 8.0 off end # NB/SB Link P2P bridge |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 34 | register "gpp_configuration" = "4" |
| 35 | register "port_enable" = "0xfc" |
| 36 | register "gfx_dev2_dev3" = "1" |
| 37 | register "gfx_dual_slot" = "0" |
| 38 | register "gfx_lane_reversal" = "0" |
| 39 | register "gfx_tmds" = "0" |
| 40 | register "gfx_compliance" = "0" |
| 41 | register "gfx_reconfiguration" = "1" |
| 42 | register "gfx_link_width" = "0" |
| 43 | end |
| 44 | chip southbridge/amd/sb600 # it is under NB/SB Link, but on the same pri bus |
| 45 | device pci 12.0 on end # SATA 0x4380 |
| 46 | device pci 13.0 on end # USB 0x4387 |
| 47 | device pci 13.1 on end # USB 0x4388 |
| 48 | device pci 13.2 on end # USB 0x4389 |
| 49 | device pci 13.3 on end # USB 0x438a |
| 50 | device pci 13.4 on end # USB 0x438b |
| 51 | device pci 13.5 on end # USB 2 0x4386 |
| 52 | device pci 14.0 on # SM 0x4385 |
| 53 | chip drivers/generic/generic #dimm 0-0-0 |
| 54 | device i2c 50 on end |
| 55 | end |
| 56 | chip drivers/generic/generic #dimm 0-0-1 |
| 57 | device i2c 51 off end |
| 58 | end |
| 59 | chip drivers/generic/generic #dimm 0-1-0 |
| 60 | device i2c 52 off end |
| 61 | end |
| 62 | chip drivers/generic/generic #dimm 0-1-1 |
| 63 | device i2c 53 off end |
| 64 | end |
| 65 | end # SM |
| 66 | device pci 14.1 on end # IDE 0x438c |
| 67 | device pci 14.2 on end # HDA 0x4383 |
| 68 | device pci 14.3 on end # LPC 0x438d |
| 69 | device pci 14.4 on end # PCI 0x4384 |
| 70 | device pci 14.5 on end # ACI 0x4382 |
| 71 | device pci 14.6 on end # MCI 0x438e |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 72 | end #southbridge/amd/sb600 |
| 73 | end # device pci 18.0 |
| 74 | |
| 75 | device pci 18.1 on end # K8 Address Map |
| 76 | device pci 18.2 on end # K8 DRAM Controller and HT Trace Mode |
| 77 | device pci 18.3 on end # K8 Miscellaneous Control |
| 78 | end #northbridge/amd/amdk8 |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 79 | end #domain |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 80 | end #northbridge/amd/amdk8/root_complex |