Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include "AGESA.h" |
| 17 | #include "amdlib.h" |
Kyösti Mälkki | e4c17ce | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 18 | #include <northbridge/amd/pi/BiosCallOuts.h> |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 19 | #include "Ids.h" |
| 20 | #include "OptionsIds.h" |
| 21 | #include "heapManager.h" |
| 22 | #include "FchPlatform.h" |
| 23 | #include "cbfs.h" |
| 24 | #if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) |
| 25 | #include "imc.h" |
| 26 | #endif |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame] | 27 | #include "hudson.h" |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 28 | #include <stdlib.h> |
| 29 | |
Kyösti Mälkki | f5f9e38 | 2014-10-17 23:21:01 +0300 | [diff] [blame] | 30 | static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); |
| 31 | |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 32 | const BIOS_CALLOUT_STRUCT BiosCallouts[] = |
| 33 | { |
| 34 | {AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer }, |
| 35 | {AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer }, |
| 36 | {AGESA_LOCATE_BUFFER, agesa_LocateBuffer }, |
Kyösti Mälkki | c5cc9f2 | 2014-10-17 22:33:22 +0300 | [diff] [blame] | 37 | {AGESA_READ_SPD, agesa_ReadSpd }, |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 38 | {AGESA_DO_RESET, agesa_Reset }, |
| 39 | {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, |
| 40 | {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, |
| 41 | {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, |
| 42 | {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, |
| 43 | {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, |
| 44 | {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config }, |
| 45 | {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } |
| 46 | }; |
| 47 | const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |
| 48 | |
| 49 | /** |
| 50 | * Realtek ALC272 CODEC Verb Table |
| 51 | */ |
| 52 | static const CODEC_ENTRY Alc272_VerbTbl[] = { |
| 53 | {0x11, 0x411111F0}, // - SPDIF_OUT2 |
| 54 | {0x12, 0x411111F0}, // - DMIC_1/2 |
| 55 | {0x13, 0x411111F0}, // - DMIC_3/4 |
| 56 | {0x14, 0x411111F0}, // Port D - LOUT1 |
| 57 | {0x15, 0x411111F0}, // Port A - LOUT2 |
| 58 | {0x16, 0x411111F0}, // |
| 59 | {0x17, 0x411111F0}, // Port H - MONO |
| 60 | {0x18, 0x01a19840}, // Port B - MIC1 |
| 61 | {0x19, 0x411111F0}, // Port F - MIC2 |
| 62 | {0x1a, 0x01813030}, // Port C - LINE1 |
| 63 | {0x1b, 0x411111F0}, // Port E - LINE2 |
| 64 | {0x1d, 0x40251E05}, // - PCBEEP |
| 65 | {0x1e, 0x01441120}, // - SPDIF_OUT1 |
| 66 | {0x21, 0x01214010}, // Port I - HPOUT |
| 67 | {0xff, 0xffffffff} |
| 68 | }; |
| 69 | |
| 70 | static const CODEC_TBL_LIST CodecTableList[] = |
| 71 | { |
| 72 | {0x10ec0272, (CODEC_ENTRY*)&Alc272_VerbTbl[0]}, |
| 73 | {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} |
| 74 | }; |
| 75 | |
| 76 | #define FAN_INPUT_INTERNAL_DIODE 0 |
| 77 | #define FAN_INPUT_TEMP0 1 |
| 78 | #define FAN_INPUT_TEMP1 2 |
| 79 | #define FAN_INPUT_TEMP2 3 |
| 80 | #define FAN_INPUT_TEMP3 4 |
| 81 | #define FAN_INPUT_TEMP0_FILTER 5 |
| 82 | #define FAN_INPUT_ZERO 6 |
| 83 | #define FAN_INPUT_DISABLED 7 |
| 84 | |
| 85 | #define FAN_AUTOMODE (1 << 0) |
| 86 | #define FAN_LINEARMODE (1 << 1) |
| 87 | #define FAN_STEPMODE ~(1 << 1) |
| 88 | #define FAN_POLARITY_HIGH (1 << 2) |
| 89 | #define FAN_POLARITY_LOW ~(1 << 2) |
| 90 | |
| 91 | /* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */ |
| 92 | #define FREQ_28KHZ 0x0 |
| 93 | #define FREQ_25KHZ 0x1 |
| 94 | #define FREQ_23KHZ 0x2 |
| 95 | #define FREQ_21KHZ 0x3 |
| 96 | #define FREQ_29KHZ 0x4 |
| 97 | #define FREQ_18KHZ 0x5 |
| 98 | #define FREQ_100HZ 0xF7 |
| 99 | #define FREQ_87HZ 0xF8 |
| 100 | #define FREQ_58HZ 0xF9 |
| 101 | #define FREQ_44HZ 0xFA |
| 102 | #define FREQ_35HZ 0xFB |
| 103 | #define FREQ_29HZ 0xFC |
| 104 | #define FREQ_22HZ 0xFD |
| 105 | #define FREQ_14HZ 0xFE |
| 106 | #define FREQ_11HZ 0xFF |
| 107 | |
| 108 | /* |
| 109 | * Hardware Monitor Fan Control |
| 110 | * Hardware limitation: |
| 111 | * HWM will fail to read the input temperature via I2C if other |
| 112 | * software switches the I2C address. AMD recommends using IMC |
| 113 | * to control fans, instead of HWM. |
| 114 | */ |
| 115 | static void oem_fan_control(FCH_DATA_BLOCK *FchParams) |
| 116 | { |
| 117 | FCH_HWM_FAN_CTR oem_factl[5] = { |
| 118 | /*temperature input, fan mode, frequency, low_duty, med_duty, multiplier, lowtemp, medtemp, hightemp, LinearRange, LinearHoldCount */ |
| 119 | /* DB-FT3 FanOUT0 Fan header J32 */ |
| 120 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 121 | /* DB-FT3 FanOUT1 Fan header J31*/ |
| 122 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 123 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 124 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 125 | {FAN_INPUT_INTERNAL_DIODE, (FAN_STEPMODE | FAN_POLARITY_HIGH), FREQ_100HZ, 40, 60, 0, 40, 65, 85, 0, 0}, |
| 126 | }; |
| 127 | LibAmdMemCopy ((VOID *)(FchParams->Hwm.HwmFanControl), &oem_factl, (sizeof (FCH_HWM_FAN_CTR) * 5), FchParams->StdHeader); |
| 128 | |
| 129 | /* Enable IMC fan control. the recommended way */ |
| 130 | #if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) |
| 131 | |
| 132 | /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */ |
| 133 | FchParams->Hwm.HwMonitorEnable = TRUE; |
| 134 | FchParams->Hwm.HwmFchtsiAutoPoll = FALSE; /* 0 disable, 1 enable TSI Auto Polling */ |
| 135 | |
| 136 | FchParams->Imc.ImcEnable = TRUE; |
| 137 | FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */ |
| 138 | FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC , 1 enable IMC, 0 following hw strap setting */ |
| 139 | |
| 140 | LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader); |
| 141 | |
| 142 | /* Thermal Zone Parameter */ |
| 143 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00; |
| 144 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */ |
| 145 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d; //BIT0 | BIT2 | BIT5; |
| 146 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0x4e; //6 | BIT3; |
| 147 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00; |
| 148 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04; |
| 149 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x9a; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 150 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01; |
| 151 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01; /* PWM steping rate in unit of PWM level percentage */ |
| 152 | FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00; |
| 153 | |
| 154 | /* IMC Fan Policy temperature thresholds */ |
| 155 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00; |
| 156 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */ |
| 157 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0x46; /*AC0 threshold in Celsius */ |
| 158 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0x3c; /*AC1 threshold in Celsius */ |
| 159 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0x32; /*AC2 threshold in Celsius */ |
| 160 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 threshold in Celsius, 0xFF is not define */ |
| 161 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 threshold in Celsius, 0xFF is not define */ |
| 162 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 threshold in Celsius, 0xFF is not define */ |
| 163 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 threshold in Celsius, 0xFF is not define */ |
| 164 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 lowest threshold in Celsius, 0xFF is not define */ |
| 165 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*critical threshold* in Celsius, 0xFF is not define */ |
| 166 | FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00; |
| 167 | |
| 168 | /* IMC Fan Policy PWM Settings */ |
| 169 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00; |
| 170 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */ |
| 171 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0x5a; /* AL0 percentage */ |
| 172 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0x46; /* AL1 percentage */ |
| 173 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0x28; /* AL2 percentage */ |
| 174 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percentage */ |
| 175 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percentage */ |
| 176 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percentage */ |
| 177 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percentage */ |
| 178 | FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percentage */ |
| 179 | |
| 180 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg0 = 0x00; |
| 181 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg1 = 0x01; /* Zone */ |
| 182 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg2 = 0x55; //BIT0 | BIT2 | BIT5; |
| 183 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg3 = 0x17; |
| 184 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg4 = 0x00; |
| 185 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg5 = 0x00; |
| 186 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg6 = 0x90; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 187 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg7 = 0; |
| 188 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg8 = 0; /* PWM steping rate in unit of PWM level percentage */ |
| 189 | FchParams->Imc.EcStruct.MsgFun81Zone1MsgReg9 = 0; |
| 190 | |
| 191 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg0 = 0x00; |
| 192 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg1 = 0x01; /* zone */ |
| 193 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg2 = 60; /*AC0 threshold in Celsius */ |
| 194 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg3 = 40; /*AC1 threshold in Celsius */ |
| 195 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg4 = 0; /*AC2 threshold in Celsius */ |
| 196 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg5 = 0; /*AC3 threshold in Celsius, 0xFF is not define */ |
| 197 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg6 = 0; /*AC4 threshold in Celsius, 0xFF is not define */ |
| 198 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg7 = 0; /*AC5 threshold in Celsius, 0xFF is not define */ |
| 199 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg8 = 0; /*AC6 threshold in Celsius, 0xFF is not define */ |
| 200 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgReg9 = 0; /*AC7 lowest threshold in Celsius, 0xFF is not define */ |
| 201 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgRegA = 0; /*critical threshold* in Celsius, 0xFF is not define */ |
| 202 | FchParams->Imc.EcStruct.MsgFun83Zone1MsgRegB = 0x00; |
| 203 | |
| 204 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg0 = 0x00; |
| 205 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg1 = 0x01; /*Zone */ |
| 206 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg2 = 0; /* AL0 percentage */ |
| 207 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg3 = 0; /* AL1 percentage */ |
| 208 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg4 = 0; /* AL2 percentage */ |
| 209 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg5 = 0x00; /* AL3 percentage */ |
| 210 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg6 = 0x00; /* AL4 percentage */ |
| 211 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg7 = 0x00; /* AL5 percentage */ |
| 212 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg8 = 0x00; /* AL6 percentage */ |
| 213 | FchParams->Imc.EcStruct.MsgFun85Zone1MsgReg9 = 0x00; /* AL7 percentage */ |
| 214 | |
| 215 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg0 = 0x00; |
| 216 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg1 = 0x2; /* Zone */ |
| 217 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg2 = 0x0; //BIT0 | BIT2 | BIT5; |
| 218 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg3 = 0x0; |
| 219 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg4 = 0x00; |
| 220 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg5 = 0x00; |
| 221 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg6 = 0x98; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 222 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg7 = 2; |
| 223 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg8 = 5; /* PWM steping rate in unit of PWM level percentage */ |
| 224 | FchParams->Imc.EcStruct.MsgFun81Zone2MsgReg9 = 0; |
| 225 | |
| 226 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg0 = 0x00; |
| 227 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg1 = 0x3; /* Zone */ |
| 228 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg2 = 0x0; //BIT0 | BIT2 | BIT5; |
| 229 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg3 = 0x0; |
| 230 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg4 = 0x00; |
| 231 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg5 = 0x00; |
| 232 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg6 = 0x0; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */ |
| 233 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg7 = 0; |
| 234 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg8 = 0; /* PWM steping rate in unit of PWM level percentage */ |
| 235 | FchParams->Imc.EcStruct.MsgFun81Zone3MsgReg9 = 0; |
| 236 | |
| 237 | /* IMC Function */ |
| 238 | FchParams->Imc.EcStruct.IMCFUNSupportBitMap = 0x333; //BIT0 | BIT4 |BIT8; |
| 239 | |
| 240 | /* NOTE: |
| 241 | * FchInitLateHwm will overwrite the EcStruct with EcDefaultMessage, |
| 242 | * AGESA put EcDefaultMessage as global data in ROM, so we can't override it. |
| 243 | * so we remove it from AGESA code. Please See FchInitLateHwm. |
| 244 | */ |
| 245 | |
| 246 | #else /* HWM fan control, using the alternative method */ |
| 247 | FchParams->Imc.ImcEnable = FALSE; |
| 248 | FchParams->Hwm.HwMonitorEnable = TRUE; |
| 249 | FchParams->Hwm.HwmFchtsiAutoPoll = TRUE; /* 1 enable, 0 disable TSI Auto Polling */ |
| 250 | |
| 251 | #endif /* CONFIG_HUDSON_IMC_FWM */ |
| 252 | } |
| 253 | |
| 254 | /** |
| 255 | * Fch Oem setting callback |
| 256 | * |
| 257 | * Configure platform specific Hudson device, |
| 258 | * such Azalia, SATA, IMC etc. |
| 259 | */ |
Kyösti Mälkki | f5f9e38 | 2014-10-17 23:21:01 +0300 | [diff] [blame] | 260 | static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 261 | { |
| 262 | AMD_CONFIG_PARAMS *StdHeader = (AMD_CONFIG_PARAMS *)ConfigPtr; |
| 263 | if (StdHeader->Func == AMD_INIT_RESET) { |
| 264 | FCH_RESET_DATA_BLOCK *FchParams = (FCH_RESET_DATA_BLOCK *) FchData; |
Kyösti Mälkki | bc3cee5 | 2015-05-23 14:19:11 +0300 | [diff] [blame] | 265 | printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 266 | //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ |
| 267 | FchParams->LegacyFree = CONFIG_HUDSON_LEGACY_FREE; |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame] | 268 | FchParams->FchReset.SataEnable = hudson_sata_enable(); |
| 269 | FchParams->FchReset.IdeEnable = hudson_ide_enable(); |
Bruce Griffith | 79f47cf | 2014-08-15 12:38:21 -0600 | [diff] [blame] | 270 | FchParams->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); |
| 271 | FchParams->FchReset.Xhci1Enable = FALSE; |
| 272 | } else if (StdHeader->Func == AMD_INIT_ENV) { |
| 273 | FCH_DATA_BLOCK *FchParams = (FCH_DATA_BLOCK *)FchData; |
| 274 | printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); |
| 275 | |
| 276 | /* Azalia Controller OEM Codec Table Pointer */ |
| 277 | FchParams->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); |
| 278 | /* Azalia Controller Front Panel OEM Table Pointer */ |
| 279 | |
| 280 | /* Fan Control */ |
| 281 | oem_fan_control(FchParams); |
| 282 | |
| 283 | /* XHCI configuration */ |
| 284 | FchParams->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); |
| 285 | FchParams->Usb.Xhci1Enable = FALSE; |
| 286 | |
| 287 | /* sata configuration */ |
| 288 | FchParams->Sata.SataClass = CONFIG_HUDSON_SATA_MODE; |
| 289 | switch ((SATA_CLASS)CONFIG_HUDSON_SATA_MODE) { |
| 290 | case SataRaid: |
| 291 | case SataAhci: |
| 292 | case SataAhci7804: |
| 293 | case SataLegacyIde: |
| 294 | FchParams->Sata.SataIdeMode = FALSE; |
| 295 | break; |
| 296 | case SataIde2Ahci: |
| 297 | case SataIde2Ahci7804: |
| 298 | default: /* SataNativeIde */ |
| 299 | FchParams->Sata.SataIdeMode = TRUE; |
| 300 | break; |
| 301 | } |
| 302 | } |
| 303 | printk(BIOS_DEBUG, "Done\n"); |
| 304 | |
| 305 | return AGESA_SUCCESS; |
| 306 | } |