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Siyuan Wang80cf7d52013-07-09 17:42:43 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Siyuan Wang80cf7d52013-07-09 17:42:43 +080014 */
15
16#include <console/console.h>
17#include <device/pci.h>
18#include <string.h>
19#include <stdint.h>
20#include <arch/pirq_routing.h>
21#include <cpu/amd/amdfam16.h>
22
23static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
24 u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
25 u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
26 u8 slot, u8 rfu)
27{
28 pirq_info->bus = bus;
29 pirq_info->devfn = devfn;
30 pirq_info->irq[0].link = link0;
31 pirq_info->irq[0].bitmap = bitmap0;
32 pirq_info->irq[1].link = link1;
33 pirq_info->irq[1].bitmap = bitmap1;
34 pirq_info->irq[2].link = link2;
35 pirq_info->irq[2].bitmap = bitmap2;
36 pirq_info->irq[3].link = link3;
37 pirq_info->irq[3].bitmap = bitmap3;
38 pirq_info->slot = slot;
39 pirq_info->rfu = rfu;
40}
41
Siyuan Wang80cf7d52013-07-09 17:42:43 +080042
43unsigned long write_pirq_routing_table(unsigned long addr)
44{
45 struct irq_routing_table *pirq;
46 struct irq_info *pirq_info;
47 u32 slot_num;
48 u8 *v;
49
50 u8 sum = 0;
51 int i;
52
Siyuan Wang80cf7d52013-07-09 17:42:43 +080053 /* Align the table to be 16 byte aligned. */
54 addr += 15;
55 addr &= ~15;
56
Kyösti Mälkki9533d832014-06-26 05:30:54 +030057 /* This table must be between 0xf0000 & 0x100000 */
Siyuan Wang80cf7d52013-07-09 17:42:43 +080058 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
59
60 pirq = (void *)(addr);
61 v = (u8 *) (addr);
62
63 pirq->signature = PIRQ_SIGNATURE;
64 pirq->version = PIRQ_VERSION;
65
Kyösti Mälkki0c797f12014-07-21 19:35:16 +030066 pirq->rtr_bus = 0;
67 pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
Siyuan Wang80cf7d52013-07-09 17:42:43 +080068
69 pirq->exclusive_irqs = 0;
70
71 pirq->rtr_vendor = 0x1002;
72 pirq->rtr_device = 0x4384;
73
74 pirq->miniport_data = 0;
75
76 memset(pirq->rfu, 0, sizeof(pirq->rfu));
77
78 pirq_info = (void *)(&pirq->checksum + 1);
79 slot_num = 0;
80
81 /* pci bridge */
Kyösti Mälkki0c797f12014-07-21 19:35:16 +030082 write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
Siyuan Wang80cf7d52013-07-09 17:42:43 +080083 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
84 0);
85 pirq_info++;
86
87 slot_num++;
88
89 pirq->size = 32 + 16 * slot_num;
90
91 for (i = 0; i < pirq->size; i++)
92 sum += v[i];
93
94 sum = pirq->checksum - sum;
95
96 if (sum != pirq->checksum) {
97 pirq->checksum = sum;
98 }
99
100 printk(BIOS_INFO, "write_pirq_routing_table done.\n");
101
102 return (unsigned long)pirq_info;
103}